Augment your Peripheral slot's performance with the Low Power and High Throughput PCIe 4.0 PHY IP Cores in 12FFC with matching PCIe 4.0 Controller IP Cores

22^nd August 2022. – T2M^IP, the global independent semiconductor IP Cores provider & Technology experts, is pleased to announce the immediate availability of its partner’s PCI-SIG compliant PCIe 4.0 PHY IP Core Silicon Proven in 12FFC process technology in major Fabs with matching PCIe 4.0 Controller IP core. These PCIe Cores have been in Production in multiple chipsets in various applications.

This Peripheral Component Interconnect Express (PCIe) Gen 4 PHY and Controller IP cores is compliant with PCIe 4.0 Base Specification with support of PIPE 4.4 interface spec and are backward compatible with older versions. This Silicon Proven 12FFC technology boasts a Low power consumption, achieved due to support of additional PLL control, reference clock control, and embedded power gating control. Also, since a fore mentioned low power mode setting is configurable, the PHY is widely applicable for various scenarios under different consideration of power consumption.

The PCIe 4.0 SerDes PHY IP cores supports data transfer rates of 2.5 GT/s, 5.0 GT/s, 8.0 GT/s and 16.0 GT/s along with a x4 width physical lane which can also support x1, x2, x4, x8, x16 lane configurations with bifurcation. Parallel interface of 32-bit is supported with an input reference clock of 100 MHz.

PCIe PHY IP cores in 12FFC process’s functionality is verified in NCVerilog simulation software using testbenches and it provides robust testability by low-cost Build-In-Self-Test (BIST) via near-end analog and external loopback interface as well as far-end.

The PCIe 4.0 Controller IP cores can be configured to support endpoint, root port, and dual-mode topologies, allowing for a variety of use models, and exposes a configurable, flexible AMBA AXI interconnect interface to the user. It has a 512b Controller architecture and 64B PIPE interface for very high performance and is compliant with SR-Iov Specifications. Highly configurable, robust DMA architecture ensures a flexible user interface & AXI4/Native Interfaces where required features can be turned on and off at core generation Phase for an optimized gate controller.

As the industry standard for PCI Express, PCIe 4.0 PHY IP cores in 12FFC which T2M offers is in volume production and has been successfully implemented in a wide range of applications such as SSD Controller, Digital TV, Setup Box, Desktops, workstations, servers, Automotive, Embedded systems, Network switches, and Enterprise computing…

In addition to PCIe IP Core, T2M ‘s broad silicon Interface IP Core Portfolio includes USB, HDMI, Display Port, MIPI (CSI, UniPro, UFS, RFFE, I3C), PCIe, DDR, 1G Ethernet, V-by-One, programmable SerDes, OnFi and many more, available in major Fabs in process geometries as small as 7nm. They can also be ported to other foundries and leading-edge processes nodes on request.

Availability: These Semiconductor Interface IP Cores are available for immediate licensing either stand alone or with pre-integrated Controllers and PHYs. For more information on licensing options and pricing please drop a request / MailTo

About T2M: T2M^IP is the global independent semiconductor technology experts, supplying complex semiconductor IP Cores, Software, KGD and disruptive technologies enabling accelerated development of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite SoCs. For more information, please visit: www.t-2-m.com