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FPGA / CPLD Articles

• Rapid debug of serial buses in FPGAs (Jul. 01, 2009)
  Low-speed serial buses remain prevalent across several electronics industries. Serial buses such as I2C, SPI, CAN, LIN, and RS-232 are often key points for debugging designs with FPGAs which higher speed serial buses quickly pass data from chip to chip. Historically, capturing and decoding the information required significant manual effort if using an oscilloscope or the purchase of custom tools. Oscilloscope vendors now incorporate significant application technology that simplifies debug of low-speed serial buses.
  
  
• Programmability in portable design: the five modes of motivation (Jun. 04, 2009)
  Wendy Lockhart explains that flash based FPGAs can replace ASICs in portable devices.
  
  
• Altera Stratix IV User Guide Lite (Jun. 01, 2009)
  This paper provides potential users an easily read and easy-to-understand overview of the capabilities of the device functions of Altera's Stratix IV FPGAs. It succinctly describes the feature set, the architecture innovations, and the process techniques that when combined make the Stratix IV FPGA the industry leader in both power and performance. Further, the article describes the functionality of these devices in far more detail than in the data sheet, but avoids the minute implementation details covered in the Stratix IV FPGA Device Handbook.
  
  
• How to reduce power consumption in CPLD designs with power supply cycling (Mar. 12, 2009)
  Power supply cycling offers designers a viable means to achieve the desired features as well as low power consumption in their CPLD designs.
  
  
• How to detect solder joint faults in operating FPGAs in real time (Mar. 05, 2009)
  Without early detection, electrical anomalies caused by solder joint faults can result in the catastrophic failure of mission-critical equipment.
  
  
• PRODUCT HOW-TO: Bringing programmability to portable design (Feb. 27, 2009)
  How Actel's flash based FPGAs can be used to replace ASICs and SRAM-based FPGAs in many portable devices
  
  
• How to control analog output from a CPLD using a pulse width modulator (Feb. 26, 2009)
  This article shows how a CPLD can replace a digital-to-analog converter, allowing it to drive an audio speaker or control things like LED intensity, motor speed, and servo position.
  
  
• Power-aware FPGA design (Part 3) (Feb. 19, 2009)
  This three-part article covers several aspects of FPGA power consumption; it also provides a new look at power dissipation numbers, and questions the traditional methods of estimating and measuring power.
  
  
• FPGA outsourcing: Ten questions you should ask (Feb. 13, 2009)
  The shortage of FPGA engineers is leading many companies to outsource FPGA development. Outsourcing has many benefits, but it also carries risks. Here are ten questions to consider before outsourcing.
  
  
• Power-aware FPGA design (Part 2) (Feb. 12, 2009)
  Analyzing differences in area, timing, and power attributes for different implementations of the same basic design reveals that considering simple, single-cycle power numbers is misleading and even erroneous.
  
  
• Implementing LTE on FPGAs (Feb. 09, 2009)
  Here's a review of the LTE algorithms and a practical implementation on a Xilinx FPGA. The reference design is tested using multiple video stream with varying encoding rates.
  
  
• Power-aware FPGA design (Part 1) (Feb. 05, 2009)
  This two-part article covers several aspects of FPGA power consumption: FPGA architecture and features, the power components associated with FPGAs, and the FPGA process technology development itself. It also provides a new look at power dissipation numbers, and questions the traditional methods of estimating and measuring power. We show that design and system power profiles are keys to successfully reducing power consumption.
  
  
• Programmable logic innovation is overdue (Jan. 29, 2009)
  Specialized, heterogeneous logic architectures can offer designers the cost and power efficiency they seek while managing development costs and keeping their time-to-market edge.
  
  
• Tips and Tricks: Using FPGAs in reliable automotive system design (Jan. 19, 2009)
  For FPGAs to be part of an ultra-reliable design, designers must protect the valid FPGA configuration used for initialization and prevent SRAM corruption during device operation
  
  
• How to transform video SerDes from a nightmare to a dream (Jan. 15, 2009)
  National Semiconductors' video SerDes solution involves a PHY chip with an interface to low-cost FPGAs and IP to implement all of the digital functionality in programmable logic.
  
  
• Using yesterday's methodologies to design today's multi-FPGA systems is a recipe for disaster (Jan. 12, 2009)
  The demand to meet multiple, sometimes conflicting, constraints means it's a wonder that FPGA and PCB designers aren't fitted for straightjackets by the time the board finally tapes out. This article explores the tools, techniques, and problems that designers struggle with when developing FPGA-based systems and, using a couple of real-world examples, attempts to offer solutions.
  
  
• Moving motion control technology to FPGAs (Dec. 15, 2008)
  Very early motion control systems used mechanical gearboxes and levers to select speeds and drive power, but these systems were quickly replaced by analog electronic controllers that provided much more flexible speed control and the ability to create systems with more complicated movements.
  
  
• How to exploit the uniqueness of FPGA silicon for security applications (Dec. 11, 2008)
  This article expands the application areas covered by FPGAs by introducing a new class of primitives called "Soft PUFs." By exploiting the silicon uniqueness of each FPGA device and incorporating a special circuit (using existing FPGA fabric) to extract these "silicon biometrics", FPGAs can be used for new security-oriented applications that were not previously possible.
  
  
• Achieve higher accuracy using mixed-signal FPGA calibration (Dec. 08, 2008)
  Mixed-signal FPGAs can be a key element of an effective, efficient, in-circuit analog-signal-channel calibration approach
  
  
• Solving FPGA I/O pin assignment challenges (Nov. 20, 2008)
  Here's a step-by-step methodology to help you pinout complex FPGAs.
  
  
• Programmable logic use in handsets--The basics (Nov. 03, 2008)
  Today a new generation of low-power FPGAs is enabling a new breed of handset designers to create handsets with features bounded only by imagination. Here's why.
  
  
• Replacing obsolete video game circuits with Xilinx CPLDs (Oct. 09, 2008)
  In this article, the author replaces a defective part in a 1980s game system to show his employer that they can replace a range of parts that vendors are no longer producing.
  
  
• How to use FPGAs to develop an intelligent solar tracking system (Sep. 25, 2008)
  This article examines the design advantages of creating an intelligent solar tracking system using an embedded processor and an FPGA in a system-on-a-chip (SOC) architecture.
  
  
• How to defend against the cloning of your FPGA designs (Sep. 18, 2008)
  This article describes a new way of tagging designs to help to counter the rapidly growing trade in stolen IP and cloned designs. The topic is a difficult one for the industry to discuss; recently, however, more and more voices have been raised on the issue.
  
  
• Systolic FIR Filter Based FPGA (Sep. 18, 2008)
  In this paper, we review in detail the basic building blocks of reconfigurable devices, essentially, the field-programmable gate arrays, then we describes a high-speed, reconfigurable Systolic Finite Impulse Response Filter design implemented in the Virtex-II series of FPGAs.
  
  
• Using FPGAs to improve your wireless subsystem's performance (Aug. 25, 2008)
  By offloading operations that require high-speed parallel processing onto FPGAs, overall system performance in such wireless operations as FIR filtering, FFTs, digital down and up conversion and FEC blocks can be improved.
  
  
• Microcontroller Design in FPGAs (Aug. 21, 2008)
  The union of Microcontroller Unit (MCU) intellectual property (IP) cores with FPGAs provides a far more flexible hardware platform than traditional MCU ASSPs.
  
  
• How to analyze and reduce power using Libero IDE (Aug. 14, 2008)
  Meeting low power FPGA design specifications requires automatic power reduction capabilities coupled with sophisticated power analysis features.
  
  
• How to give crime-fighters a flexible, high-performance edge with programmable logic (Jul. 24, 2008)
  This article examines the use of FPGAs and soft-core embedded processors in two crime-fighting applications: a fingerprint identification system and a wireless auto-tracking camera.
  
  
• How to simplify power design development and evaluation for FPGA-based systems (Jul. 10, 2008)
  Validation of power supply voltage at the FPGA; real-time monitoring of Vccint power consumption; realistic power estimates using accurate on-die temperature measurement.