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MoSys' 1T-SRAM(R) CLASSIC Running in Volume Production on Chartered's 0.13-micron ProcessShipping High-Performance Networking and Low-Power Portable Storage Applications SUNNYVALE, Calif.--Feb. 15, 2006--MoSys, Inc. (Nasdaq:MOSY - News), the industry's leading provider of high-density system-on-chip (SoC) embedded memory solutions, and Chartered Semiconductor Manufacturing, one of the world's top dedicated semiconductor foundries, announced today the successful volume production of a range of high-performance networking and low-power portable storage customer product applications, designed using MoSys' 1T-SRAM CLASSIC memory macros and manufactured on Chartered's 0.13-micron logic process. The 0.13-micron CLASSIC macros incorporate MoSys' proprietary 1T-Q® folded capacitor bit cell for maximum density; and TEC® error correction circuitry delivering the additional benefits of improved yield and reliability with elimination of costly laser repairs and dramatic reduction in soft error rates. "MoSys and Chartered have presented a breakthrough solution to a key manufacturing challenge for high-density embedded memory products," said Chet Silvestri, chief executive officer at MoSys, Inc. "This latest, successful collaboration is based on a shared commitment by the companies to meet the critical needs of a wide range of customer requirements, with reliable and flexible products and manufacturing." "Once again, Chartered has demonstrated the advanced capability of its 0.13-micron process in bringing to market complex SoC designs," said Dominique Simon, president of the Americas at Chartered. "Working together, Chartered and MoSys are well-positioned to help leading semiconductor companies with high-performance and low-power product demands benefit from a reliable production ramp to meet competitive time-to-market goals." About MoSys Inc. Founded in 1991, MoSys, develops, licenses and markets innovative memory technologies for semiconductors. MoSys' patented 1T-SRAM technologies offer a combination of high density, low power consumption, high speed and low cost unmatched by other available memory technologies. The single transistor bit cell used in 1T-SRAM memory results in the technology achieving much higher density than traditional four or six transistor SRAMs while using the same standard logic manufacturing processes. 1T-SRAM technologies also offer the familiar, refresh-free interface and high performance for random address access cycles associated with traditional SRAMs. In addition, these technologies can reduce operating power consumption by a factor of four compared with traditional SRAM technology, contributing to making them ideal for embedding large memories in System on Chip (SoC) designs. MoSys' licensees have shipped more than 100 million chips incorporating 1T-SRAM embedded memory technologies, demonstrating excellent manufacturability in a wide range of silicon processes and applications. MoSys is headquartered at 755 N. Mathilda Avenue, Sunnyvale, California 94085. More information is available on MoSys' website at http://www.mosys.com.
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