English
Faraday Collaborates with Novas to Accelerate Debugging of Designs Containing Memory IPs
Faraday Integrates Memory Compilers with Novas’ Verdi Automated Debug System
SAN JOSE, Calif. – July 31, 2006 -- Novas Software, Inc., the leader in debug systems for complex chip designs, and Faraday Technology , a leading ASIC and IP provider, today jointly announced that Faraday's memory compilers are now integrated with Novas' Verdi™ Automated Debug System. Chip designers who use Faraday's memory compilers and Novas' debug system will now be able to simulate and debug their designs faster and easier.
Faraday's memory compilers automatically generate memory models for use in the Verdi debug system. These memory models reduce both simulation run times and Fast Signal Database (FSDB) file sizes because they eliminate the need to record the memory contents during simulation. Instead, Verdi uses the memory models along with the FSDB and design files to analyze memory behavior on-the-fly during debugging. When users encounter design behavior issues affected by memory outputs, Verdi automatically computes the values necessary to continue interactive analysis so users can trace the causes of design behavior back through the memory.
“Novas is committed to collaboration with companies that help accelerate the verification and debug process,” said George Bakewell, Director of Product Marketing for Novas. “Faraday's memory compilers producing memory models that work with our Verdi debug system is a great example of this.”
“As an IP provider, Faraday is obligatory to provide necessary and qualified model deliverables for users' design and verification flow to shrink total design cycle time. We are glad to cooperate with Novas and launch the MDT model, which can help users to check and verify memory behavior with a more efficient way in Verdi™ ,” said Kun-Cheng Wu, Director of Design Development Division at Faraday Technology.
Availability
The version 200601.3 of Faraday memory complier Memaker™ is available since now ( July, 2006) , and the MDT model will be formal released including 1-port SRAM, dual-port SRAM, 1-port register file and 2-port register file.
About Novas Software
Novas Software, Inc. is the leading provider of design comprehension solutions for engineers designing complex ICs, embedded systems and SoCs. Novas' Verdi automated debug and Siloti™ visibility enhancement products dramatically accelerate the process for understanding and correcting design problems starting from system-level specification through silicon implementation. Novas is headquartered in San Jose , Calif. with offices in Europe, Japan and Asia-Pacific. For more information, visit www.novas.com.
About Faraday Technology Corporation
Faraday Technology Corporation is a leading silicon IP and fabless ASIC vendor. The company's broad SIP portfolio includes 32-bit RISC CPUs, DSPs, MPEG4, H.264, PHYs/Controllers for USB 2.0, 10/100 Ethernet, Serial ATA, PCI Express, Cell Library and Memory Compiler. With more than 650 employees and 2005 revenue of US$175 million, Faraday is one of the largest fabless ASIC companies in the Asia-Pacific region, and it also has a significant presence in other world-wide markets. Headquartered in Taiwan , Faraday has service and support offices around the world, including the U.S. , Japan , Europe, and China . For more information, please visit :www.faraday-tech.com
SAN JOSE, Calif. – July 31, 2006 -- Novas Software, Inc., the leader in debug systems for complex chip designs, and Faraday Technology , a leading ASIC and IP provider, today jointly announced that Faraday's memory compilers are now integrated with Novas' Verdi™ Automated Debug System. Chip designers who use Faraday's memory compilers and Novas' debug system will now be able to simulate and debug their designs faster and easier.
Faraday's memory compilers automatically generate memory models for use in the Verdi debug system. These memory models reduce both simulation run times and Fast Signal Database (FSDB) file sizes because they eliminate the need to record the memory contents during simulation. Instead, Verdi uses the memory models along with the FSDB and design files to analyze memory behavior on-the-fly during debugging. When users encounter design behavior issues affected by memory outputs, Verdi automatically computes the values necessary to continue interactive analysis so users can trace the causes of design behavior back through the memory.
“Novas is committed to collaboration with companies that help accelerate the verification and debug process,” said George Bakewell, Director of Product Marketing for Novas. “Faraday's memory compilers producing memory models that work with our Verdi debug system is a great example of this.”
“As an IP provider, Faraday is obligatory to provide necessary and qualified model deliverables for users' design and verification flow to shrink total design cycle time. We are glad to cooperate with Novas and launch the MDT model, which can help users to check and verify memory behavior with a more efficient way in Verdi™ ,” said Kun-Cheng Wu, Director of Design Development Division at Faraday Technology.
Availability
The version 200601.3 of Faraday memory complier Memaker™ is available since now ( July, 2006) , and the MDT model will be formal released including 1-port SRAM, dual-port SRAM, 1-port register file and 2-port register file.
About Novas Software
Novas Software, Inc. is the leading provider of design comprehension solutions for engineers designing complex ICs, embedded systems and SoCs. Novas' Verdi automated debug and Siloti™ visibility enhancement products dramatically accelerate the process for understanding and correcting design problems starting from system-level specification through silicon implementation. Novas is headquartered in San Jose , Calif. with offices in Europe, Japan and Asia-Pacific. For more information, visit www.novas.com.
About Faraday Technology Corporation
Faraday Technology Corporation is a leading silicon IP and fabless ASIC vendor. The company's broad SIP portfolio includes 32-bit RISC CPUs, DSPs, MPEG4, H.264, PHYs/Controllers for USB 2.0, 10/100 Ethernet, Serial ATA, PCI Express, Cell Library and Memory Compiler. With more than 650 employees and 2005 revenue of US$175 million, Faraday is one of the largest fabless ASIC companies in the Asia-Pacific region, and it also has a significant presence in other world-wide markets. Headquartered in Taiwan , Faraday has service and support offices around the world, including the U.S. , Japan , Europe, and China . For more information, please visit :www.faraday-tech.com
|
||||||
Related News
- SEMIFIVE collaborates with Arm to accelerate its custom SoC designs
- Synopsys Expands Memory Verification IP Portfolio with UFS, UniPro and eMMC to Accelerate Verification Closure for Mobile Designs
- Faraday Technology Corporation Selects Synopsys Virtualizer to Accelerate Software Development for SoC Designs
- Faraday Announces the First Commercially Available 1GHz Memory Compiler to Enable GHz CPU & SoC Designs in UMC 90nm
- Novas and Denali team to speed debugging using memory subsystem information
Breaking News
- Numem at the Design & Reuse IP SoC Silicon Valley 2024
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- TSMC Celebrates 30th North America Technology Symposium with Innovations Powering AI with Silicon Leadership
- Keysight, Synopsys, and Ansys Deliver Radio Frequency Design Migration Flow to TSMC's N6RF+ Process Node
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
Most Popular
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Qualitas Semiconductor Appoints HSRP as its Distributor for the China Markets
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
|
E-mail This Article | 
|
|
Printer-Friendly Page |