Xelic Announces Successful Integration of Industry's First 40Gb/s SONET/SDH Framer Core into Customer Equipment
This core adds to a growing family of networking IP product offerings from Xelic. The 40Gb/s SONET/SDH Framer Core (XCS768C) performs framing and byte alignment, transport overhead processing, contiguous concatenated pointer processing and path overhead processing for use in a variety of applications such as line cards, routers and test equipment.
“Xelic is committed to developing highly configurable Core solutions that allow customers to rapidly deploy increasingly integrated systems” said Dave Wurthmann, IP Business Development.
Additional XCS768C product information and FPGA resource requirements can be obtained by contacting Xelic (www.xelic.com).
Xelic is a privately held intellectual property provider and engineering services company. Xelic was founded in January of 2002 and is located in Rochester, NY. For more information about Xelic, please visit www.xelic.com.
|
Related News
- Xelic Announces Family of SONET/SDH Transport Processor Cores for Integration into FPGA or ASIC Networking Applications
- Xelic Announces SONET/SDH Tributary Payload Processor Core Availability for Integration into ASIC or FPGA Networking Applications
- T2M is excited to announce the successful licensing of our partner's Silicon-Proven 1G Ethernet PHY IP Cores on a Tier-1 Foundry in Korea, using the advanced 14LPP process, in collaboration with a leading Tier-1 Korean customer
- Avalon Microelectronics Announces Availability of 40G SONET/SDH Framer/Mapper/Pointer Processor
- Silicon & Software Systems (S3) announces successful integration of its DVB-H software with Philips' smartphone platform
Breaking News
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- SEMIFIVE Starts Mass Production of its 14nm AI Inference SoC Platform based Product
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
- Efabless Launches an "AI Wake Up Call" Open-Source Silicon Design Challenge
Most Popular
- Intel and Arm Team Up to Power Startups
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- Renesas Introduces Industry's First General-Purpose 32-bit RISC-V MCUs with Internally Developed CPU Core
- SmartSoC Solutions Joins TSMC Design Center Alliance to Boost Semiconductor Innovation in India
E-mail This Article | Printer-Friendly Page |