DOLPHIN Integration releases a ROM in 65 nm with Ultra high density and ultra low leakage
May 9, 2007 -- DOLPHIN Integration releases a ROM in 65 nm with Ultra high density and ultra low leakage:
- Denser than dense is what everyone in the semiconductor industry is looking for!
- Every mm2 saved in return saves a ggod number of cents.
Its key “two-in-one” patent enables “tROMet Phoenix” to achieve challenging density, while equally offering ultra low leakage.
Typically, the silicon area of a 6-Mbit instance in 65 nm will decrease as far as 0.63 mm2 with only 1.2 uA leakage current, and the same 6-Mbit instance in 90 nm will be as low as 0.95 mm2 with only 1.8 uA leakage current.
For more information, please visit:
http://www.dolphin.fr/flip/ragtime/65/ragtime_65_rom.html
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Dolphin Design Hot IP
Related News
- Dolphin Integration announces its ultra low power, low leakage and High density 65 nm ROMs and RAMs
- Dolphin Integration announce the availability of new ROM TITAN and ultra low leakage standard cell library SESAME BIV at TSMC 55 nm LP eFlash
- Dolphin Integration offers first standard cell library to enable a leakage reduction of 1/350 at 65 and 55 nm
- Dolphin Integration releases its RAM for 90 nm nodes with dual optimization: for ultra-low power and for extremely high density
- Ultra high density standard cell library SESAME uHD-BTF to enrich Dolphin Integration's panoply at TSMC 90 nm eF and uLL
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