Meylan, France. April 28, 2008
- Managing the power consumption of a SoC is an issue of growing concern in the submicron processes. Among the diverse design techniques progressively developed, the partitioning of a SoC into voltage islets is the ultimate solution.
The performance of of each islet of the SOC must be optimized differently for best effectiveness: for lowest dynamic power or for lowest leakage, with or without retention registers, etc. Dolphin Integration's low power and low voltage library SESAME uVSvHS
enables operating as low as 0.9 V in 0.18 µm and is available in TSMC G, TSMC ULL and IBM process. Its association with an inductorless switching converter
enabling a variety of voltage ranges can be embedded for better cost efficiency than with an external Power Management Unit. About Dolphin Integration’s SESAME library
SESAME is a grouping of specialized and well-structured “library stems”: all such library stems are ultimately optimized for one prime criterion, e.g. Low Power Consumption (LC), High Density (HD), Low Leakage (LL), while simultaneously offering a good performance on a second criterion. SESAME is classified as a “Reduced Cell Stem Library” (RCSL): each library stem of SESAME results from a handcrafted work of art, cell by cell. Indeed, each cell is carefully optimized at both electrical and layout levels to provide the highest performance on the chosen optimization criterion of the stem.
More information on SESAME at: http://www.dolphin.fr/flip/sesame/sesame_overview.html