Sofics Releases Analog IO's and ESD protection clamps for Advanced Applications using TSMC 7nm FinFET process
Proven technology significantly reduces risk, time-to-market and overall cost
Belgium, April 8, 2019 – Sofics bvba, a leading semiconductor integrated circuit IP provider announced that it has expanded its TakeCharge® Electrostatic Discharge (ESD) and Analog IO portfolio with solutions for the TSMC 7nm FinFET process. Sofics has already verified its TakeCharge Analog IO’s and ESD protection clamps on a wide variety of processes, including CMOS, SOI and FinFET technologies across various fabs and foundries.
Sofics is a foundry independent semiconductor IP provider that has supported 60+ fabless companies worldwide with customized/specialty Analog I/Os and on-chip ESD protection. Most foundries provide I/O libraries for free. However, for several application types the general purpose I/Os introduce all kinds of limitations. Fabless companies using Sofics IP can enable higher performance, higher robustness and reduce design time and cost. The technology is silicon and product proven in more than 3000 mass produced IC-products.
Interface ESD protection in FinFET technology is challenging. The FinFET circuits fail easily under stress and the traditional ESD concepts are not effective anymore. Moreover, for advanced applications free GPIO libraries introduce limitations on the circuit performance due to excessive parasitic capacitance, leakage or voltage tolerance.
“Our specialized interface solutions enable product reliability and manufacturing yield for the leading-edge applications in the world’s most advanced foundry process”, said Koen Verhaege, CEO of Sofics. “This defines one of our key roles in the IP eco-system: reducing time-to-market and optimizing customer profit by mitigating the risk, expenses and delays of ESD re-design. The cells provide competitive advantage through improved yield, reduced silicon footprint and enable high speed, higher operating voltages and complex architectures.“
“Whether it is 0.18um CMOS or 7nm FinFet does not really matter. Fabless companies will always benefit from a shorter timeline and a lower cost combined with the confidence of a working solution”.
TakeCharge cells as well as robust I/O solutions are readily available from Sofics.
About Sofics
Sofics stands for “Solutions for ICs”. We are a foundry independent IP provider with a track record in on-chip robustness for ESD, EOS and EMC. Leveraging an extensive patent portfolio, more than 70 licensees, product proof in more than 50 processes, generates on average every day one new IC volume production release including Sofics IP.
|
Related News
- Sofics releases Analog I/O's and ESD clamps for TSMC N5 process
- Sofics Analog I/O's and ESD clamps proven for TSMC 16nm, 12nm and 7nm FinFET processes
- Sofics releases pre-silicon analog I/O's for high-speed SerDes for TSMC N5 process technology
- Sofics releases its ESD technology on TSMC 3nm process
- Keysight, Synopsys, and Ansys Accelerate RFIC Semiconductor Design with New Reference Flow for TSMC's Advanced 4nm RF FinFET Process
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |