ARC introduces 16/32-bit instruction set architecture to reduce memory requirements by up to 30 per cent
ARC introduces 16/32-bit instruction set architecture to reduce memory requirements by up to 30 per cent ARC's configurable processor adds the ability to run both 16 and 32-bit instructions on a 32-bit architecture, allowing designers to reduce memory requirements by up to 30%, resulting in both lower power consumption and cost in SoCs for consumer electronics, networking and wireless systems.
San Jose, CA, 12th June 2001 - ARC International plc (LSE:ARK), trading through its subsidiaries as ARC Cores, will today announce at the Embedded Processor Forum ARCompact? , an innovative instruction set architecture (ISA) that allows designers to mix 16 and 32-bit instructions on its 32-bit user-configurable processor. The key benefit of the ISA is the ability to cut memory requirements on a SoC (system-on-chip) by up to 30 per cent, resulting in lower power consumption and lower cost devices in deeply embedded applications such as wireless communications and high volume consumer electronics products.
The main features of the ARCompact ISA include new 32-bit instructions aimed at providing better code density, a new set of 16-bit instructions for the most commonly used operations, and freeform mixing of 16 and 32-bit instructions without a mode switch - significant because it reduces the complexity of compiler usage compared to competing mode-switching architectures. Phil Barnard, product manager responsible for ARCompact said, ?The new instruction set expands the number of custom extension instructions that customers can add to the base-case ARCtangent? processor instruction set. The existing processor architecture already allows customers to add as many as 69 new instructions to speed up critical routines and algorithms. With the new ISA, customers can add as many as 256 new instructions. As before, customers can also add new core registers, auxiliary registers, and condition codes. The ARCompact ISA thus maintains and expands the user-customizable features of ARC?s configurable processor technology.?
Phil Barnard, comments, ?As 32-bit architectures become more widely used in deeply embedded systems, code density can have a direct impact on system cost. Typically up to 90 per cent of the silicon area of a system-on-chip (SoC) is taken up by memory.?
The ARCompact ISA delivers high density code helping to significantly reduce the memory required for the embedded application, a vital factor for high-volume consumer applications, such as flash memory cards. In addition, by fitting code into a smaller memory area, the processor potentially has to make fewer memory accesses. This can cut power consumption and extend battery life for portable devices such as MP3 players, digital cameras and wireless handsets. Finally, the new, shorter instructions can improve system throughput by executing in a single clock cycle some operations previously requiring two or more instructions. This can boost application performance without having to run the processor at higher clock frequencies - a capability already utilized by ARC?s existing customers.
The support for freeform use of 16 and 32-bit instructions allows compilers and programmers to use the most suitable instructions for a given task, without any need for specific code partitioning or system mode management. Direct replacement of 32-bit instructions with new 16-bit instructions provides an immediate code density benefit, which can be realized at an individual instruction level throughout the application. As the compiler is not required to restructure the code, greater scope for optimizations is provided, over a larger range of instructions. Application debugging is more intuitive because the newly generated code follows the structure of the original source code.
The new ISA will first become available with the release of the ARCtangent-A5 processor in Q4 2001.
About ARC International
ARC International plc is a leading developer of customizable, high-performance microprocessor cores, including ARCtangent?, and related intellectual property technology enabling designers to reduce time to market for their system-on-a-chip products. Over 50 customers use ARC?s technology, including: BrightCom, Conexant, Fujitsu Microlectronics, IBM, Infineon Technologies, SanDisk, Texas Instruments and VTech Communications. Products available based on ARC?s technology include digital still cameras, set-top boxes, and network processors.
MetaWare Inc., Precise Software Technologies Inc. and VAutomation Inc. are wholly owned subsidiaries of ARC International, providing software development tools, hardware and software intellectual property and real-time operating systems for an integrated approach to system on a chip development. ARC?s third party partners include Cadence, Flextronics, Intrinsix, Synopsys, TSMC, UMC, Wind River and Xilinx.
With headquarters in Elstree, England, ARC International plc and its group companies employ over 300 people in research and development, sales, and marketing offices across North America, Europe and Israel. ARC International plc is listed on the London Stock Exchange (LSE:ARK). The company?s website is located at http://www.arccores.com
Persons contemplating designing using this information do so at their own risk and should contact their [ARC] representative to ensure that they are using current and correct information. ARC International (UK) Ltd. and ARC Cores Inc. trade under the name of ARC Cores. ARC Cores is a trademark of ARC International (UK) Limited. All other brands or product names are the property of their respective holders