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ESL Design News

• CoWare Reduces Design Cost for Complex ARM AMBA Platform Optimization (Jun. 15, 2009)
  CoWare announced the availability of a new Interconnect and Memory Subsystem Performance Optimization design flow for CoWare Platform Architect, enabling early and efficient optimization of next-generation system-on-chip (SoC) architectures using ARM® AMBA®-based virtual platforms.
  
  
• Cadence and Virtutech Extend Metric-Driven Verification to Virtual Systems Development (May. 19, 2009)
  Cadence and Virtutech today announced a collaboration to integrate Cadence® Incisive® Software Extensions with the Virtutech Simics® high-speed system-level virtual platform.
  
  
• CoWare and Carbon Announce CoWare Model Library Availability of Implementation-Accurate Models of ARM IP (Apr. 27, 2009)
  CoWare and Carbon Design Systems announced today a strategic partnership to deliver implementation-accurate models of ARM® IP targeted for CoWare’s SystemC-based design solutions. The models and model kits will include implementation-accurate solutions for the ARM Cortex™-A9 processor, AMBA®3 Interconnect (PL301) matrix, and more.
  
  
• OCP-IP Delivers New Advanced SystemC TLM Kit (Apr. 21, 2009)
  OCP-IP today announced the availability of the SystemC TLM kit for OCP. The new kit represents the first, and most advanced TLM-2.0 based, industry-ready kit in existence today.
  
  
• DOCEA Power unveils first ESL solution for modelling, simulating and optimizing the power and heat dissipation of electronic systems (Apr. 20, 2009)
  DOCEA Power today announced ACEplorer®, the first ESL software tool that allows designers to model, simulate and optimize the dynamic power and thermal behaviour of whole complex systems, either on-chip, on-board or with multiple boards.
  
  
• Renesas & CoWare Collaborate to Accelerate the Deployment of SH-based Virtual Platforms in Mobile, Automotive and Digital Imaging Applications (Apr. 20, 2009)
  CoWare, announced today a collaboration with Renesas Technology Corp. aimed at delivering better development tools to Renesas’ SH core-based software development community using virtual platforms.
  
  
• Carbon and MIPS Technologies Partner for Model Distribution (Apr. 08, 2009)
  Carbon and MIPS announced today that they have partnered to deliver models of MIPS® processor cores to Carbon’s SoC Designer customers. Development teams will now have the capability to debug their MIPS firmware code in the industry’s fastest cycle-accurate virtual prototyping environment.
  
  
• CoWare Releases Reference Library to Accelerate the Design of Long Term Evolution (LTE) Wireless Systems (Apr. 01, 2009)
  The new library adds to CoWare’s already available suite of solutions that address the challenges of designing software, algorithms and architectures for LTE networks, basestations, handsets and chip sets. The CoWare LTE Library (Compliant to 3GPP LTE Release V8.5.0) runs on the ultra-fast CoWare Signal Processing Designer multi-threaded simulator.
  
  
• CoWare Releases New Platform-Centric Software Analysis Tool to Increase Multicore Software Development Productivity (Mar. 30, 2009)
  The platform-centric software analysis tool is an Eclipse-based framework that provides the visibility to debug and optimize across the boundaries of processes, operating systems, cores, and hardware. It supports the configuration, acquisition and display of the acquired data. It can be made OS aware (Linux example provided) and is customizable to adapt to customer-specific analysis needs.
  
  
• Agilent Technologies' New System-Level Communications Design Software Speeds Development Cycle (Mar. 09, 2009)
  Agilent today announced the availability of a new platform for electronic system-level (ESL) design. The new platform delivers modeling, design-flow improvements and baseband IP libraries that can cut months from physical layer (PHY) design time for high-performance communications algorithms and system architectures in both wireless and aerospace/defense applications.
  
  
• CircuitSutra partners with GreenSocs to provide high quality SystemC based SoC modelling services (Feb. 16, 2009)
  CircuitSutra Technologies Pvt Ltd today announced it has entered into a partnership with GreenSocs Ltd, UK to deliver high quality SystemC based SoC modelling services to the semiconductor industry.
  
  
• OVP Simulator Smashes SystemC TLM-2.0 Performance Barrier (Feb. 13, 2009)
  Open Virtual Platforms (OVP) today released new native SystemC transaction level modeling (TLM)-2.0 technology to use with OVP CPU models that run to the speed of one billion (1B) instructions per second (1,000 MIPS).
  
  
• CoWare and Rambus Announce Unique ESL Architecture Design Environment for Rambus' XDR Memory Architecture (Feb. 09, 2009)
  CoWare and Rambus announced they have collaborated on a comprehensive ESL design environment with CoWare Platform Architect for Rambus’ award-winning XDR™ memory architecture. CoWare will distribute a SystemC model with the flexibility to match configurations of Rambus’ XDR memory subsystems.
  
  
• Mentor Graphics Announces Scalable TLM-2.0 Design Flow Using Vista and Catapult C Synthesis Electronic System Level (ESL) Design Tools (Jan. 20, 2009)
  Mentor Graphics today announced a new Scalable Design Methodology based on a layered transaction level model (TLM) that allows a single model to be taken from design concept to implementation.
  
  
• Ricoh Deploys CoWare ESL 2.0 Solutions for Architecture Optimization and Pre-Silicon Software Development (Jan. 19, 2009)
  CoWare announced today that Ricoh is deploying CoWare ESL 2.0 solutions in production for system-on-chip (SoC) platform architecture design and pre-silicon software development. In their first project, a next generation wireless communications SoC for office automation applications, Ricoh achieved a 90% savings in operating system porting and boot loader software development time with CoWare virtual hardware platforms compared to previous experience with traditional design methods and FPGA prototyping.
  
  
• OSCI Debuts Standard for SystemC Analog Mixed-Signal Extensions (Dec. 03, 2008)
  The AMS draft 1 standard proposes the first definitions for the design and modeling of embedded analog/mixed-signal systems at higher levels of abstraction, such as those found in telecommunication, automotive and imaging sensor applications.
  
  
• JEDA Launches the First Commercial TLM2.0 Compliance Checker (Nov. 26, 2008)
  The TLM-2.0 Compliance Checker is part of the JEDA TLM-2.0 Validation Suite. The product targets high-level OSCI TLM-2.0 model developers and OSCI TLM-2.0 compliant Virtual Platform users.
  
  
• Carbon Design Systems Unleashes Latest Version of SoC Designer (Nov. 03, 2008)
  Carbon assumed development, support and sales of SoC Designer from ARM® in July, and now offers a complete system validation solution with cycle-accurate system modeling, cycle-optimized platform creation, execution and analysis, and cycle-accurate model kits for ARM intellectual property (IP).
  
  
• Calypto, Forte Collaboration Results in Advanced SystemC Design Flow (Oct. 23, 2008)
  The seamless integration of Calypto's SLEC(TM) System-HLS formal verification software and Forte's Cynthesizer(TM) SystemC synthesis offers a complete SystemC to register transfer level (RTL) design flow
  
  
• CoWare and MontaVista Deliver Joint Solution to Accelerate Software Development for Linux-based Devices (Oct. 02, 2008)
  Solution Enables Companies to Accelerate Linux Education, Linux Support Package Development and Linux-based Device Development, Integration and Test Using CoWare Virtual Platforms
  
  
• DSPACE, VaST Collaborate on Simulating Automotive Software on Virtual Hardware Platforms (Sep. 23, 2008)
  The goal of the collaboration is to closely couple dSPACE's automotive software development tools TargetLink and SystemDesk with VaST's virtualization tools COMET® and METeor®.
  
  
• Agilent Technologies' New Electronic System-Level EDA Platform Helps Algorithm Developers, System Architects Cut Design Time in Half (Sep. 17, 2008)
  The new platform cuts physical layer (PHY) design time in half for high-performance communications algorithms and system architectures, for both wireless and aerospace/defense applications.
  
  
• VaST Integrates CoMET and METeor into Eclipse 3.3 Framework (Sep. 09, 2008)
  VaST today announced the availability of the latest versions of its virtual system prototyping tools, CoMET® and METeor™ version 6.1 fully integrated into the Eclipse 3.3 (Europa) Framework.
  
  
• Imperas Announces Verification, Licensing, Distribution Agreement With MIPS Technologies (Aug. 19, 2008)
  Imperas models of MIPS® processor cores will be verified by MIPS Technologies under the MIPS-Verified™ program.
  
  
• CoWare Delivers Ultra High-Speed, MIPS-Verified Instruction Set Simulators for MIPS32 Cores (Aug. 18, 2008)
  Agreement with MIPS Technologies Enables Model Availability to Speed Development of Robust, Optimized MIPS-Based Products
  
  
• Cadence Expands System-Level Offerings With Introduction of C-to-Silicon Compiler (Jul. 14, 2008)
  Cadence today introduced Cadence® C-to-Silicon Compiler, a high-level synthesis product that improves designer productivity up to 10 times in creating and re-using system-on-chip IP
  
  
• PGC Adopts S2C's FPGA-based ESL Tools to Streamline Front-End Design Service Flow (Jul. 02, 2008)
  Complementing proven strengths in back-end design, integrated chip (IC) fabrication, and production logistics, PGC will now employ S2C’s Virtex-5 TAI Logic Module to enact system-on-chip (SoC) design creation, verification, and customer sign-off capabilities on FPGA prototype.
  
  
• CoWare Delivers Support for ARM Cortex-based Applications (Jun. 30, 2008)
  Major Semiconductor and Mobile Phone Companies Rely on CoWare's ESL 2.0 Solutions for Optimizing ARM Cortex-based Designs
  
  
• Virtutech Announces Breakthrough Hybrid Simulation Capability Allowing Mixed Levels of Model Abstraction (Jun. 16, 2008)
  Supports Advanced Freescale QorIQ™ P4080 Multicore Processor; Hybrid Simulation Infrastructure Leverages Proven Simics® Simulator
  
  
• Freescale Delivers Virtual Platforms to Continental Using CoWare ESL 2.0 Solutions (Jun. 03, 2008)
  Standards-based Solutions for Pre-silicon Software Development Accelerate Collaborative Development of the Industry’s First Triple-Core Automotive MCU