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Cadence Design Systems, Inc.

Headline       Sign Up for SoC News Alert	Publication
Cadence Withdraws Proposal to Acquire Mentor Graphics	Aug. 15, 2008
Open Verification Methodology Helps KPIT Cummins Boost Productivity, Shorten Turnaround Time	Jul. 31, 2008
OKI Turns to Cadence and the Open Verification Methodology (OVM) to Speed Product Development	Jul. 29, 2008
Cadence Reports Q2 Revenue of $329 Million	Jul. 24, 2008
Cadence Expands System-Level Offerings With Introduction of C-to-Silicon Compiler	Jul. 14, 2008
Cadence and Mentor Enhance Open Verification Methodology and Expand Community Activities to Support Rapidly Growing User Base	Feb. 14, 2008
Cadence and Mentor Announce Immediate Availability of the Open Verification Methodology	Jan. 09, 2008
Cadence Joins the HyperTransport Consortium	Dec. 07, 2007
Cadence Extends DFM Solution with Acquisition of Design-side Litho and Variability Leader Clear Shape Technologies	Aug. 17, 2007
Cadence and Mentor Graphics Deliver Interoperability with Open SystemVerilog Verification Methodology	Aug. 16, 2007
Cadence strengthens Verification Alliance program in India by adding 13 new partners	Nov. 28, 2006
Cadence Aligns with IBM to Accelerate ASIC Design with Cadence Logic-Design Team Technology	Nov. 13, 2006
Cadence Announces Availability of Design-In IP Portfolio for Memory Designs	Sep. 18, 2006
Cadence Debuts Industry's First Transaction-Based System Verification and Management Solution	Jun. 12, 2006
Cadence Releases Proven Reference Methodology for New ARM Cortex-R4 Processor	May. 15, 2006
Cadence and CEVA Collaborate to Deliver Verification Process Automation to End Customers	Mar. 01, 2006
Initial Ballot to Make e Language an IEEE Standard Passes Overwhelmingly	Nov. 14, 2005
Cadence Advances Segmentation Strategy with 3 Tiers of Verification Products and Methodologies	Oct. 24, 2005
Cadence Announces New Capabilities to Simplify and Accelerate PowerPC Design	Sep. 27, 2005
Cadence PCI Express Solution Passes PCI-SIG Compliance Testing	Apr. 25, 2005
Cadence Completes Acquisition of Verisity	Apr. 07, 2005
Cadence and Verisity Announce Expiration of Hart-Scott-Rodino Waiting Period	Feb. 28, 2005
Cadence Augments Verification Solution and Expertise Through Acquisition of Verisity	Jan. 12, 2005
Cadence Announces Comprehensive Assertion-based Verification Solution	Oct. 18, 2004
Cadence Design Systems Names Michael J. Fister, Former Top Intel Executive, as President and CEO	May. 12, 2004
IPCore and Cadence Collaborate to Launch Advanced Design Methodology Based on CSMC Process	Aug. 29, 2003
New Cadence Incisive Verification Platform Compresses Overall Verification of Nanometer-scale Designs by Up to 50 Percent	Feb. 24, 2003
Cadence Partners With Leading Test Equipment Vendors to Provide Early System Verification for 2.5/3g and 802.11 Wireless Applications	Dec. 09, 2002
Cadence Reports Third Quarter Results	Oct. 15, 2002
Cadence First Encounter Adopted by Silicon Integrated Systems (SiS) For High Performance Graphics Chip Designs	Aug. 27, 2002
Cadence Speeds Communication Systems Design Chains	Jul. 15, 2002
Cadence Delivers Verification Productivity Boost For Complex SoC Designs Through Commitment to Industry Standards	May. 28, 2002