Design & Reuse

Industry Articles

SoC Packaging: SiPs form good SoC alternative, but designer beware

-
March 15, 2005
EE Times: Latest News
SoC Packaging

 


  • SiPs form good SoC alternative, but designer beware
    Before the system-on-chip there was the multichip module. This technology, which bonded dice to a silicon or laminate substrate within a single package, still thrives in high-value applications that demand dense integration of diverse technologies, such as the microwave and military markets.


  • Package can be integration platform

  • Choosing the right strategy for SiP testing

  • SiP modules call for right blend of tech

  • 3-D ICs address SiPs' technical shortfalls


  • SiPs: Intelligent partitioning and integration for today's electronics

  • Overcoming the Technical Challenges of System-in-Package (SiP)

  • RF SiPs pose design challenges in passive integration

  • Lessons learned taking SiP to production

  •