Design & Reuse
arrow Chip to Chip (6)
arrow Die-to-die (23)
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56 IP
1
45.0
Ncore 3 Coherent Network-on-Chip (NoC)
For scalable and area-efficient heterogeneous cache coherent systems....
2
45.0
Ncore 3 Coherent Network-on-Chip (NoC)
For scalable and area-efficient heterogeneous cache coherent systems....
3
40.0
Coherent Network-on-chip (NoC) IP
C-NoC is a layered, scalable, configurable, and physically aware configurable NoC. It supports mesh, grid and torus topologies with simultaneous exist...
4
40.0
Non-coherent Network-on-chip (NoC) IP
NC-NoC is a layered, scalable, physically aware configurable NoC supporting multiple clocking schemes for SoCs that do not require coherency. NC-NoC s...
5
16.0
Die-2-die interfaces for chiplets
Analog I/OS and power line ESD solutions All voltage domains (0.75V to 5V) Additional voltage (e.g. 12V in 28nm proven)...
6
15.0
Coherent Network-on-Chip (NoC)
SkyeChip's NoC is the first in the world that is able to reconfigure routing paths after tapeout. It is a scalable and area efficient interconnect sol...
7
14.0
40G Ultralink D2D PHY for GF12LP+
Proprietary chiplet interconnect solution with high-performance, high-bandwidth, and long reach die-to-die link connectivity The Cadence® UltraLink™ ...
8
14.0
40G Ultralink D2D PHY for Samsung 7LPP
Proprietary chiplet interconnect solution with high-performance, high-bandwidth, and long reach die-to-die link connectivity The Cadence® UltraLink™ ...
9
14.0
Universal Chiplet Interconnect Express (UCIe 1.0) Controller
Ultra-low latency UCIe controller for standard industry chiplet interoperability on streaming, PCIe, and CXL protocols The Cadence UCIe™ Controller i...
10
11.0
Die-to-Die (D2D) Interconnect
Lightweight die-to-die interconnect solution optimized for highest performance with the lowest power and area overhead...
11
10.0
UCIe based 8-bit 48-Gsps Transceiver (ADC/DAC/PLL/UCIe)
Unleash the power of the new UCIe based RF Chiplet transceiver. With NEXT Semiconductor's silicon proven 8-bit, 48-Gsps Transceiver, this product ...
12
9.0
UCIE 2.0 Controller
The InPsytech UCIe 2.0 (Universal Chiplet Interconnect Express) Controller is a high-performance designe to facilitate efficient communication between...
13
7.0
Non-Coherent Network-on-Chip (NoC)
SkyeChip's NoC is the first in the world that is able to reconfigure routing paths after tapeout. Performance (throughput and latency) optimized non-...
14
5.0
High speed NoC (Network On-Chip) Interconnect IP
OPENEDGES is the only total memory system IP company providing both memory controller and on-chip interconnect. OIC is the ORBIT high-speed On-chip In...
15
3.0
600Mbps Low Power D2D Interface in 16nm
Custom die-to-die interface in 16nm process technology. The I/O cell is bi-directional and has two modes of operation: standard rail-to-rail swing or ...
16
3.0
<4Gbps Low Power D2D Interface
Custom die-to-die high-speed interface in 28nm process technology. The I/O cells are defined as TX only, and RX only, and have two modes of operation,...
17
0.0
1 - 33Gbps PCIe Gen1-5 SerDes PHY (AXLinkIO MR)
The AXLinkIO MR IP utilizes the silicon-proven AXLinkIO transceiver architecture for medium-reach and PCIe type of channel links....
18
0.0
2-16Gbps Die-to-Die (D2D) Multi-Protocol IO Supporting BOW, OHBI and UCIe
The AresCORE 16G Die-to-Die (D2D) IP implements a wide-parallel and clock forwarded PHY interface for multichannel interconnections up to 16Gbps. The ...
19
0.0
1-56/112G Multi-protocol Serdes (Interlaken, JESD204, CPRI, Ethernet, OIF/CEI)
eTopus designs ultra-high speed mixed-signal semiconductor IP solutions for high-performance computing and data center applications. Our 1-56/112Gbps ...
20
0.0
1-56G-PCIe Gen5 ePHY Multi-Protocol SerDes IP - 7nm Low Power and Latency
Ultra-high speed SerDes IP, adopted by global Tier-1 network/storage/5G OEMs and major semiconductor companies. eTopus is the pioneer on PAN4 ADC/DSP...
21
0.0
5/10/40G Ultra Low Latency MAC PCS with AXI-4 and UCIe support
This IP is optimized for AI/ML workloads and lowest possible latency.It is not meant to be a generic 1G to 10G MAC &ndash; it only supports 5G and 10G...
22
0.0
D2D PHY (Die-to-Die Interface)
Die-to-Die (D2D) PHY IP is based on HBM electrical specification and will also be compatible with upcoming interface standards. It is used specificall...
23
0.0
D2D Controller IP (Die-to-Die Interface)
OpenFive s Die-to-Die (D2D) Controller IP is targeted for heterogenous chiplet solutions in wired communications, AI and HPC applications. With recent...
24
0.0
33G Die-to-Die SerDes PHY (12nm 16nm)
The AnalogX AXDieIO IP utilizes the silicon-proven AXLinkIO transceiver architecture for die-to-die, in package, type of channel links....
25
0.0
25-112Gbps Extra Short-Reach (XSR) Multi-Standard SerDes (MSS)
The Alphawave DieCORE delivers the world s highest density, lowest power die-to-die connectivity solution for MCMs based on OIF XSR/USR serial standar...
26
0.0
RAMLinx interconnect
RAM of any size and kind in your EFLX&reg; array Many applications like DSP benefit from blocks of RAM distributed in the array. Of course it is possi...
27
0.0
Scatter-Gather DMA - AXI4-Stream to/from AXI4 Memory Map Transfers
The Digital Blocks DB-DMAC-MC-AXI4-MM-STREAM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Mem...
28
0.0
UCIe 2.0 Controller
The InPsytech UCIe 2.0 (Universal Chiplet Interconnect Express) Controller is a high-performance designe to facilitate efficient communication between...
29
0.0
UCIe PHY & D2D Adapter
Neuron IP’s UCIe PHY & D2D Adapter IP portfolio includes 32Gbps UCIe-Advanced (UCIe-A) & Standard (UCIe-S) cores as per the latest UCIe v1.1 specifica...
30
0.0
Die-to-Die PHY
Eliyan uses its NuLink technology to develop die-to-die PHY IP products to support multiple standards (including UCIe and BoW) and multiple packaging ...
31
0.0
Highly configurable Interlaken ILA & ILK
Tamba Networks offers a highly configurable Interlaken ILA and ILK core. The core is compliant with the Interlaken and Interlaken look-aside specifica...
32
0.0
FlexNoC 5 Network-on-Chip (NoC)
Arteris FlexNoC 5 network-on-chip (NoC) physically aware interconnect IP improves development time, performance, power consumption, and die size of sy...
33
0.0
FlexNoC 5 Option For Scalability and Performance Critical Systems
Arteris IP FlexNoC Performance Option accelerates development of next-generation deep neural network (DNN) and machine learning systems. Automate and ...
34
0.0
FlexNoC Resilience Package
For complex SoCs in advanced process nodes, CPU duplication and memory protection logic are no longer sufficient to address all the metrics required t...
35
0.0
FlexWay Interconnect IP
FlexWay 5 from Arteris is an essential entry-level IP generator for cost-efficient, high-performance network-on-chip (NoC) designs. It revolutionizes ...
36
0.0
Cloud-active NOC configuration tool for generating and simulating Coherent and Non-Coherent NoCs
iNoCulator is a cloud-active EDA tool that is used to define the topology of a NoC quickly and easily, configure its parameters and simulate it to mea...
37
0.0
BlueLynx Executable Generator Technology
BlueLynx&trade; technology revolutionizes the game in silicon design and engineering. Using proprietary technology, Blue Cheetah eliminates inefficien...
38
0.0
KNiulink Chiplet Solution
Based on the traditional advantages of SerDes and DDR IP, KNiulink Semiconductor has launched a solution that meets the UCIe standard based on local r...
39
0.0
Innovative Ultra-High-Speed Chiplet Solution
Innosilicon INNOLINK™ IP provides a leading-edge chiplet solution allowing massive amounts of low-latency data to pass seamlessly between smaller chip...
40
0.0
Interconnect Technology
EXTOLL introduces a new interconnection network architecture for High-Performance Computing, which brings a rich set of features to the HPC applicatio...
41
0.0
Mobiveil RapidIO Controller (GRIO)
Mobiveil Generic RapidIO (GRIO) controller is a highly flexible and configurable IP to provide RapidIO interface on one side and a generic interface o...
42
0.0
NoC Generator
A web-based NOC configuration tool for generating and simulating Coherent and Non-Coherent NoCs...
43
0.0
CodaCache Last Level Cache IP
CodaCache is a configurable, standalone, non-coherent cache IP that delivers unique business value through its advanced last-level cache (LLC) archite...
44
0.0
Low Power Dual PHY for UCIe low cost robust Chiplets
YorChip UniPHY&trade; Dual PHY is a flexible version of YorChip&#39;s multi-protocol PHY which supports UCIe and BOW standards. The Dual PHY&#39;s uni...
45
0.0
XPHY Low power Chip to Chip SerDes IP, Silicon Proven in ST 28FDSOI
These IPs are targeted at applications requiring high speed, high bandwidth, low-power consumption, and low-latency interfaces....
46
0.0
IPT UCIE-A PHY, Advanced Package
The InPsytech (IPT) UCIe-A PHY is a state-of-the-art physical layer interface, offering industry-leading power efficiency and proven in mass productio...
47
0.0
IPT UCIE-A PHY, TSMC N5/N4P
The InPsytech (IPT) UCIe-A PHY is a mass-production proven, state-of-the-art physical layer interface designed to provide exceptional performance and ...
48
0.0
TSMC CLN6FF/7FF Die-to-Die Interface PHY
IGAD2DX01A is a high speed die-to-die interface PHY which transmits data through INFO RDL channels. IGAD2DX01A contains 32 Tx lanes and 32 Rx lanes pe...
49
0.0
NuLink - Interconnect Solution
Eliyan s Interconnect technology built with standard organic chip packaging delivers the same performance as advanced packaging technology, and enable...
50
0.0
Multi-Die interLink (GLink 2.3) IP
GUC multi-die interLink (GLink) IP provides world’s best class solution for high-bandwidth, low-power, low-latency multi-channel interconnection in a ...