Industry Articles
	
    
    
    
	    	
	    	
	    	
	    		
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				    		A cost-effective and highly productive Framework for IP Integration in SoC using pre-defined language sensitive Editors (LSE) templates and effectively using System Verilog Interfaces 
							(Monday, July 25, 2016)
				    	
				    
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				    		Versatile FPGA IP Handing, Creation, and Packaging 
							(Friday, July 22, 2016)
				    	
				    
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				    		Analysis: OMAP35x brings Cortex-A8 to the mass market 
							(Tuesday, July 19, 2016)
				    	
				    
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				    		Efficient SIMD and Algorithmic Optimization Techniques for H264 Decoder on Cortex A9 
							(Monday, July 18, 2016)
				    	
				    
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				    		10 FPGA Design Techniques You Should Know 
							(Friday, July 15, 2016)
				    	
				    
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				    		Clock Path Pessimism: Statistical vs. Logical 
							(Monday, July 11, 2016)
				    	
				    
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				    		Setting up secure VPN connections with cryptography offloaded to your Altera SoC FPGA 
							(Monday, July 11, 2016)
				    	
				    
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				    		FPGA constraints for the modern world: Product how-to 
							(Friday, July 8, 2016)
				    	
				    
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				    		Easing Heterogeneous Cache Coherent SoC Design using Arteris' Ncore Interconnect 
							(Thursday, July 7, 2016)
				    	
				    
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				    		FPGAs solve challenges at the core of IoT implementation 
							(Tuesday, July 5, 2016)
				    	
				    
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				    		Platform Software Verification Approaches For Safety Critical Systems 
							(Monday, July 4, 2016)
				    	
				    
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				    		Synchronizing sample clocks of a data converter array 
							(Friday, July 1, 2016)
				    	
				    
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				    		Safety Integrity Level - an Overview for FPGA Engineers 
							(Thursday, June 30, 2016)
				    	
				    
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				    		No Safety without Security on the IoT  
							(Thursday, June 23, 2016)
				    	
				    
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				    		Software Certifications and Standards: What Every Device Manufacturer Should Know 
							(Thursday, June 23, 2016)
				    	
				    
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				    		What's in the Future for High-Speed SerDes? 
							(Thursday, June 16, 2016)
				    	
				    
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				    		Thorough validation: the conundrum of Pulsed latch libraries turned practical as Spinner systems 
							(Monday, June 13, 2016)
				    	
				    
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				    		Fronthaul Evolution Toward 5G: Standards and Proof of Concepts 
							(Monday, June 13, 2016)
				    	
				    
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				    		Lossless Medical Video Compression Using HEVC 
							(Monday, June 6, 2016)
				    	
				    
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				    		Making embedded software reusable for SoCs 
							(Thursday, June 2, 2016)
				    	
				    
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				    		Methodology to lower supply voltage of standard cell libraries  
							(Thursday, June 2, 2016)
				    	
				    
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				    		Neural Networks and the Rings of Power  
							(Wednesday, June 1, 2016)
				    	
				    
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				    		Custom Corner Characterization for Optimal ASIC/SoC Designs 
							(Thursday, May 26, 2016)
				    	
				    
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				    		ATPG Challenges at Lower Technology Nodes  
							(Tuesday, May 24, 2016)
				    	
				    
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				    		Toward an intuitive system design environment 
							(Monday, May 23, 2016)
				    	
				    
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				    		Building Multi-Port USB Type-C Adapters for Power  
							(Monday, May 23, 2016)
				    	
				    
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				    		New Layers Form within the Cloud  
							(Monday, May 16, 2016)
				    	
				    
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				    		10 Favorite FPGA-Based Prototyping Boards 
							(Wednesday, May 11, 2016)
				    	
				    
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				    		Security Considerations For Bluetooth Smart Devices 
							(Monday, May 9, 2016)
				    	
				    
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				    		Schedule Based Verification 
							(Wednesday, May 4, 2016)
				    	
				    
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				    		Integrated Low Power Verification Suite: The way forward for SoC use-case Verification 
							(Tuesday, May 3, 2016)
				    	
				    
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				    		Control an FPGA bus without using the processor 
							(Thursday, April 28, 2016)
				    	
				    
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				    		Careful IP Integration Key to First-Pass Silicon 
							(Tuesday, April 26, 2016)
				    	
				    
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				    		The Mathematics of Range Anxiety  
							(Monday, April 25, 2016)
				    	
				    
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				    		Foundation IP for 7nm FinFETs: Design and Implementation 
							(Thursday, April 21, 2016)
				    	
				    
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				    		Choosing the right memory for high performance FPGA platforms 
							(Wednesday, April 20, 2016)
				    	
				    
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				    		VLSI implementation of OFDM modem 
							(Monday, April 18, 2016)
				    	
				    
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				    		FPGA Debug in the Modern World 
							(Tuesday, April 12, 2016)
				    	
				    
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				    		Corner Case Scenario Generation (CCSG) Tool: A Novel Approach to find corner case bugs in next generation SoCs 
							(Monday, April 11, 2016)
				    	
				    
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				    		Data Center Ethernet: Is a Bigger Pipe Enough?  
							(Tuesday, April 5, 2016)
				    	
				    
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				    		Down & dirty with HW/SW co-design: Part 4 – Multi-objective optimization 
							(Monday, April 4, 2016)
				    	
				    
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				    		Understanding cascaded integrator-comb filters 
							(Friday, April 1, 2016)
				    	
				    
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				    		Best Practices for a Reusable Verification Environment 
							(Friday, April 1, 2016)
				    	
				    
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				    		Yes, you can develop embedded software using agile methodology 
							(Tuesday, March 29, 2016)
				    	
				    
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				    		NVMe IP for Enterprise SSD 
							(Thursday, March 24, 2016)
				    	
				    
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				    		Making SPI-4.2 Implementations More Efficient: Part 1 
							(Tuesday, March 22, 2016)
				    	
				    
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				    		Analyzing High-Speed Serial Links (Rambus) 
							(Tuesday, March 22, 2016)
				    	
				    
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				    		Unlock and Load: Characterizing Today's PLLs 
							(Tuesday, March 22, 2016)
				    	
				    
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				    		Entering the Backplane Fast Lane 
							(Tuesday, March 22, 2016)
				    	
				    
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				    		Exploring design methodologies for next-generation IoT sensors 
							(Tuesday, March 22, 2016)