Video current D/A converters: some fundamentals for IP use

Typical Video D/A converters have 8 to 10 bits of accuracy and operate at speeds of between 100 to 400 MHz. At these speeds, current D/As are the preferred architecture since current D/As are less sensitive to capacitive loads and can also easily swing to ground. Current D/As will also directly drive a video cable, eliminating the need for a buffer between the DAC outputs and the cable. Video D/As typically have three channels, although two and four channels D/As are also used. The three channel D/As are usually referred to as RGB DACs, signifying the Red, Green and Blue signals which are transmitted to video monitors (See figure 1).

Figure 1: Video D/A converter architecture

Since the DACs utilize a current output architecture, a method is needed to convert the output currents into voltages. This is done using resistors, with one set of resistors placed on the graphics card near the graphics chip outputs in the PC and another set of resistors placed inside the monitor. Usual values for these resistors are 75 ohms and when used with a video cable with a characteristic impedance of 75 ohms, creates a balanced transmission line system with proper terminations that will minimize reflections. Using this system, the resistive load that each DAC drives is 37.5 ohms and using a full scale swing of 1 volt gives a full scale current output requirement of about 26.7mA. Another popular full scale voltage swing is 0.7V, giving a full scale current requirement of 18.7mA.

The three channel Video current DAC consists of a voltage reference circuit, a current bias generator circuit, a small amount of digital logic and the three current DAC output channels. The voltage reference is usually a bandgap reference circuit, which in typical CMOS generic logic processes has an output voltage of about 1.2v and an absolute accuracy of about 3 percent over process, voltage and temperature. This is sufficient for most video applications. (See figure 2). The bandgap circuit drives a current bias generator circuit.

Figure 2: Current bias generator

The purpose of the current bias generator circuit is to convert the stable bandgap voltage into a stable reference current. It performs this function using an opamp, a source follower transistor and a resistor. The bandgap drives the positive side of the opamp. The opamp output drives the gate of the source follower, which has its source tied to both the resistor and the negative input of the opamp. With the other side of the resistor tied to ground, negative feedback in the circuit causes the opamp output to adjust the current through the source follower transistor (and resistor) until the bandgap voltage appears across the resistor. Thus, a stable current is created which is equal to the bandgap voltage divided by the resistance.

This current is then used to drive the three D/A channels. Since this current is common to all three D/A channels, matching between the D/As will be very good, being about 3 percent in most CMOS processes. Typical CMOS logic processes have internal resistors which have absolute tolerances on the order of +/-35 percent. This tolerance will result in unacceptable tolerances of the output current and so typically the resistor used for the current bias generator circuit is provided by an “off-chip” resistor. Using a 1 percent accurate external resistor will give about a 4 percent worse case uncertainty in the output current from the current bias generator circuit.

There is a small amount of logic inside the Video current D/As. Data enters the Video DAC on the input data signals and then is latched using the rising edge of the clock signal. Once the data is latched, it is then routed to a decode logic circuit, whose function is to convert the DAC data into individual signals that will drive the DAC current source switches in the output stages of the D/As. For a 10 bit DAC, this would mean decoding the 10 bits into 1024 individual signals. These individual signals are in turn, routed to a second set of latches (See figure 3). These latches are sometimes referred to as “local” latches since each latch is located near its corresponding set of switches in the output stage of the DACs.

Figure 3: D/A converter output stages

The latency of the D/A can be reduced by a half of a clock cycle by using the negative edge of the clock to latch the data into the local latches. In most video applications, the latency of the converters is not important, and so this technique is not always utilized. The purpose of the local latches is to allow the switches in the output stages of the DACs to switch at the same time, which minimizes glitches on the output of the D/As. It is desirable to keep the glitch energy of the glitches to under 50 pVs (pVolt-seconds) values, and the use of local latches keeps the glitch energy to under these values. Great care in routing of the clock signals is used in order to get the local latches to switch all at the same time. Generating a clock tree for the local latch clock signals is the usual practice, similar to what is done for clock signals inside digital chips.

The DAC output stages comprise of many individual current sources, whose outputs are summed together. Since the DAC outputs are currents, the outputs from each output stage can simply be connected together. An individual DAC output stage consists of a current source and a set of switches. (See figure 3). The current sources are driven from the current bias generating circuit. Since all of the output stages are driven from the current bias generating circuit, the full scale output current of all three D/As can be easily scaled simply by changing the external resistor value of the bias circuit. The switches are used to route the current from the current source to the outputs. Two switches are used such that the current from the current source flows through either one switch or the other. One purpose of using two switches is to generate a fully differential output signal. Another purpose of using two switches is to insure that the current source is always turned on. If only one switch was used, the current source would turn on and off which would severely limit the speed of the DAC.

Therefore using two switches insures that the current source is always turned on. It is for this reason that the power supply current for Video current D/As is fairly constant and independent of the data setting of the D/As. In most cases, the complimentary outputs of the Video current D/As are not used and so in order to save 3 pins on the IC package, the three complimentary DAC outputs are grounded internal to the Video D/As.

The Video current DAC layout size and linearity are primarily determined by the output stage current source architecture. There are two basic architectures that can be used in current D/As (See figure 4). The first output stage current source architecture is the binary weighted current source structure. In this architecture, each output current source has a binary weighting of 1I, 2I, 4I, etc.. So for a 10 bit current DAC, the largest output current source has a weight of 512I, and thus, only 10 output current sources are needed for a 10 bit DAC. The area for this architecture is small and the decode logic is simple since there are only ten sets of switches to drive.

Figure 4: Output stage current source topologies

The disadvantages of this architecture are poor linearity (especially DNL), generation of large glitches on the output and no guarantee of being monotonic. All of these disadvantages are attributed to the poor matching of the current sources, which is the result of having current sources with significant differences in size. The second output stage current source architecture is the thermometer weighted current source structure. In this architecture, each output current source has the same weight. So for a 10 bit current DAC, there would be 1024 equally weighted current sources. Using this architecture, the DAC will always be monotonic since the output current can only increase as each current source is individually turned on. Also, the linearity of this architecture is good since each current source has the same weight and thus can be easily matched in the layout. The disadvantages of the thermometer weighted architecture are the more complex decoding logic and the much larger size of the D/As due to having 1024 current sources in each DAC.

In order to take advantage of both the binary weighted and thermometer weighted output stage architectures, a segmented architecture is used, such that a few bits of the DAC use a binary output stage weighting, while the rest of the bits use a thermometer code weighting (See figure 5). This is the most common approached used in modern Video current D/As. Utilizing a segmented architecture gives good linearity and size. Adjusting the ratio of the binary weighted output stages verses the thermometer weighted output stages allows the designer to make linearity verses size tradeoffs. Typical ratios used are 7:3, with the 7 most significant bits of the DAC using a thermometer output stage weighting and the 3 least significant bits of the DAC using a binary output stage weighting.

Figure 5: Segmented D/A converter output stages

A typical 10 bit, three channel Video DAC designed in a 0.13um [[Greek mu-m]] generic logic CMOS process and using a 7:3 segmented architecture is about 0.84 square millimeters in size and has a measured DNL of about 0.5 LSB’s. A similar three channel DAC in the same process and using a 8:2 segmented architecture is about 1.15 square millimeters in size and has a measured DNL of about 0.3 LSB’s. The 5:5 architecture has been shown to be the point where the DNL is about 1 LSB, where it is difficult to keep the DAC monotonic.

Much of the performance of the DAC can be attributed to the DAC layout and more specifically, the layout of the output stage current sources. Isolating the digital signals from the analog signals is critical, along with randomizing the placement of the output current sources which helps average out the process variations across the die and thus, improving the linearity.

These are the fundamentals and architectures used in Video current source D/As that are widely used in personal computers and TV’s. By providing a stable current source reference and adjusting the output stage current source segmentation ratio, trading off size and linearity, high quality Video DACs can be designed and integrated into large graphics chips that can support a wide variety of Video applications.