English
Designing control circuits for FPGA-based DSP systems
If you need to design a control circuit for your FPGA-based DSP system, these simple techniques could save you days of work.
By Narinder Lall and Brad Taylor, Xilinx, Inc.
August 11, 2006 -- pldesignline.com
FPGAs have made significant strides as engines for implementing high-performance signal processing functions, whether for ASIC replacement or performance acceleration in the signal processing chain with DSP processors. Although much has been written about how to use FPGAs as signal processors, not much has been published about building control circuits within such systems.
There are perhaps two key decisions to make when implementing control circuits for FPGA-based DSP systems:
By Narinder Lall and Brad Taylor, Xilinx, Inc.
August 11, 2006 -- pldesignline.com
FPGAs have made significant strides as engines for implementing high-performance signal processing functions, whether for ASIC replacement or performance acceleration in the signal processing chain with DSP processors. Although much has been written about how to use FPGAs as signal processors, not much has been published about building control circuits within such systems.
There are perhaps two key decisions to make when implementing control circuits for FPGA-based DSP systems:
- Should the control circuit be implemented in hardware or developed as a software algorithm?
- What building blocks are available to make the development of the control circuit as efficient and painless as possible?
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Related Articles
- Designing a high-definition FPGA-based graphics controller
- Designing an FPGA-based graphics controller
- FPGAs: Embedded Apps : Designing an FPGA-based network communications device
- How to Reduce FPGA Logic Cell Usage by >x5 for Floating-Point FFTs
- Clock sources with integrated power supply noise rejection simplify power supply design in FPGA-based systems
New Articles
- MIPI in FPGAs for mobile-influenced devices
- Optimizing 16-Bit Unsigned Multipliers with Reversible Logic Gates for an Enhanced Performance
- How NoC architecture solves MCU design challenges
- Automating Hardware-Software Consistency in Complex SoCs
- Beyond Limits: Unleashing the 10.7 Gbps LPDDR5X Subsystem