By Paul Greene, NVISION and Shubha Tuljapurkar, TelairityMarch 07, 2007 -- digitaltvdesignline.com
Video compression is a complex, compute-intensive task with numerous filtering and matrix operations. Current MPEG2 video codec chips have built-in DSPs, or special VLIW engines, and some hard-coded functionality to compress video in real-time. However, as the industry moves to high definition (HD) encoding, there is six times as much data to process as standard definition (SD), and the H.264/ AVC compression standard is greater than five times as complex as MPEG2, due to the large number of compression tools and options in AVC that can be used to compress a superlative picture at half the bit rate of MPEG2.
Broadcast equipment manufacturers developing new encoding products have to address different application requirements including those for the rapidly emerging IPTV segment. Encoding solutions must not only deliver high video quality and a low bit rate, but they should also be adaptable to the feature needs of the quickly proliferating range of video platforms. There are several solutions available to meet the challenges of HD video encoding, including PC platforms, FPGAs, dedicated ASIC/System on-chip codecs, and DSPs. We discuss the benefits and costs of each of these solutions, and draw on Telairity's experience in developing its H.264 HD real-time encoders to highlight the importance of programmable architectures for encoding solutions that deliver long-haul viability.
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