By Mark Ng, Xilinx
August 22, 2007 -- pldesignline.com
There has been an increasing demand to add multiple Secure Digital (SD) devices in a single system. The problem, however, is that most host devices/processors, for example Intel PXA270, TI OMAP, or Qualcomm MSM processors, only provide a single SD interface. Fortunately, Complex Programmable Logic Devices, otherwise known as CPLDs, can be used to allow host devices to support any number of SD devices. This article details a scalable, auto-sensing bidirectional multiplexer-based design.
Creating an SD Multiplexer using CPLDs
Fig 1 shows a generalized CPLD usage model to incorporate any number of SD ports for a given host device that only has a single native SD interface. The CPLD is placed between the host controller and the SD devices. As such, the CPLD part performs a bidirectional multiplexing function, allowing the host to communicate with any selected SD Device. More importantly, this design has no directional control pins, which means that the CPLD automatically detects the direction of data flow.
1. Using CoolRunner-II CPLDs to provide additional SD ports.
This implementation is extremely flexible and scalable, meaning that the number of SD ports can be increased or decreased as desired. The design also supports any of the defined SD card modes – SPI, 1-bit, or 4-bit data modes.
While the primary purpose of using a CPLD device in this type of application is to provide additional SD ports to the host controller, secondary benefits include level translation and logic isolation between the host and the SD card. Fig 1 shows the case where the host is 1.8V, but the SD Devices are 3.3V. The industry's latest CPLDs provide negligible standby current and ultra low dynamic power consumption. Hence, incorporating a complex programmable logic device in your system will not significantly impact your power budget.
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