Filip Thoen, Synopsys(02/11/2008 9:00 AM EST) -- EE Times
As research pushes for better programming models for multiprocessor and multicore (MC) embedded systems, virtual platforms solve one of today's biggest challenges in these systems: software debugging and validation. In addition to enabling software development long before hardware availability, virtual platforms are a practical enabler for MC systems today by their provision of better software development and debugging support than actual hardware. Virtual platforms offer unprecedented control and visibility, along with ease in deterministically reproducing MC problems.
With the right level of model abstraction, these platforms can handle MC complexity while offering high-speed execution of complete MC software stacks and requiring a relatively modest effort for platform development. The key is to use functional transaction-level modeling (TLM) for the virtual platform with abstracted or approximate timing, called Loosely Timed (LT) or Approximately Timed (AT), respectively. This approach relies on high-speed processor instruction-set simulators (ISSs) and high-level, fully functional SystemC/C++ models of the other hardware building blocks.
Even though the use of both homogeneous and heterogeneous MC architectures has increased dramatically, embedded software development practices have not adapted well to the complexities of these architectures. MC architectures pose new challenges in software partitioning and in the mapping of parallel software tasks in an optimized and predictable fashion, as well as in software debugging and validation. Asynchronous interactions among concurrent processors introduce both functional and timing software problems such as race conditions, deadlocks and memory corruption. Worse, their concurrent nature simultaneously makes it hard to pinpoint the causes of system problems.
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