By Dave Elliott, Altera
pldesignline.com (October 15, 2008)Abstract
Statistics derived from a representative sample of traffic accidents state that approximately 20% of traffic accidents are due to drivers' drowsy driving. Additionally, drowsy driving is the reason for 22%-30% of severe traffic accidents resulting in death.
To address the dangers of highway drivers who doze off at the wheel, vehicle manufacturers as well as technology companies are unveiling sophisticated new driver drowsiness alert systems.
Many of these solutions are developed with technologies such as embedded systems, digital signal processing, and intelligent control. For designers wanting to enhance metrics such as real-time performance, accuracy, and reliability, however, technology that includes embedded soft-core processors and programmable logic can offer a more flexible, extensible foundation.
This article examines a prototypical real-time driver drowsiness tracking system based on a soft-core embedded processor, an FPGA, and a system-on-a-chip (SOC) architecture.Are we keeping you awake?
Whether drifting into another lane or flat-out falling asleep at the wheel, drowsy drivers are one of the road's most dangerous hazards. The challenge lies in preventing fatigued motorists from continuing behind the wheel. Vehicle manufacturers and technology companies alike are committed to tackling this problem, devoting research and development resources to enhancing drowsy driver monitoring equipment.
Many of these systems utilize a mix of embedded, digital signal processing (DSP), and intelligent control technologies. For equipment designers who want to enhance metrics such as real-time performance, accuracy, and reliability, however, embedded soft-core processors and programmable logic can support a more flexible, extensible underlying foundation. Further, designing the equipment using a system-on-a-chip (SOC) architecture can simplify design complexity, debugging, and system maintenance.
A student design team from South China University of Technology devised a way to tap into the performance and design advantages of a soft-core, 32-bit embedded processor, an FPGA, and SOC design methodologies to create a prototypical real-time driver drowsiness tracking system. By using an FPGA in the embedded design, the team was able to take advantage of the logic rich resources of the device for complex system-level functions.
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