By BDTI
DSP DesignLine (02/24/09, 12:00:00 PM EST)
BDTI has released BDTI DSP Kernel Benchmarks results for the CEVA-TeakLite-III core from CEVA. As we've written previously, CEVA-TeakLite-III is a 32-bit DSP core that primarily targets audio applications (both portable and high-definition) but also targets VoIP and cellular baseband. It is the third generation of CEVA's TeakLite architecture, and the first to use a native 32-bit data size. The CEVA-TeakLite-III also supports SIMD (single-instruction, multiple data) dual-16-bit MACs.
The CEVA-TeakLite-III competes with a range of general-purpose DSP and CPU cores from vendors such as VeriSilicon, ARM, and MIPS, and also with application-specific audio solutions, such as Tensilica's 330HiFi audio core and ARC's Sound Subsystems cores. According to CEVA, the CEVA-TeakLite-III core runs at up to 550 MHz in a 65 nm process and 335 MHz in a 130 nm process; in 130 nm, it consumes 0.47 mm2 and 70 mW.
BDTI benchmarked the CEVA-TeakLite-III core using the BDTI DSP Kernel Benchmarks™, a suite of 12 common signal processing algorithms (including various FIR and IIR filters, an FFT, a Viterbi decoder, etc.) The results on these benchmarks are used to generate BDTI's composite DSP speed score, the BDTImark2000™ (or BDTIsimMark2000™, for processors whose results have been verified on a simulator rather than on hardware). A higher BDTImark2000™ score indicates a faster processor.
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English
BDTI has released BDTI DSP Kernel Benchmarks results for the CEVA-TeakLite-III core from CEVA. As we've written previously, CEVA-TeakLite-III is a 32-bit DSP core that primarily targets audio applications (both portable and high-definition) but also targets VoIP and cellular baseband. It is the third generation of CEVA's TeakLite architecture, and the first to use a native 32-bit data size. The CEVA-TeakLite-III also supports SIMD (single-instruction, multiple data) dual-16-bit MACs.
