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A SystemC-Based RTOS Model for Multiprocessor Systems-on-Chips
By Jan Madsen, Kashif Virk, and Mercury Jair Gonzalez
Embedded.com (03/16/09, 03:30:00 PM EDT)
With the increasing complexity of embedded systems and the capacity of modern silicon technology, there is a trend toward heterogeneous architectures consisting of several programmable as well as dedicated processors, implemented on a single chip, known as systems-on-chips (SoCs).
As more applications are implemented in software that in turn is growing larger and more complex, dedicated operating systems will have to be introduced as an interface layer between the application software and the hardware platform.
Global analysis of such heterogeneous systems is a big challenge. Typically, two aspects are of interest when one is considering global analysis: the system functionality, in general, and the system timing and resource sharing, in particular.
As many embedded applications are reactive in nature and have real-time requirements, it is often not possible to analyze them statically at compile time. Furthermore, for single-chip solutions, we may need to use nonstandard real-time operating systems (RTOS) in order to limit the code size and hence the memory requirements, or to introduce special features interacting with the dedicated hardware, such as power management.
When implementing an RTOS, we may wish to experiment with different scheduling strategies in order to tailor the RTOS to the application. For a multiprocessor platform, we may wish to study the system-level effects of selecting a particular RTOS implementation on one of the processors.
To study these effects at the system level, before any implementation has been done, we need a system-level model that is able to capture the behavior of running a number of RTOS on a multiprocessor platform.
We refer to such a system-level model as an abstract model. In this first part on concepts and terminology and followed by succeeding parts on uniprocessors (Part 2) and then multiprocessors (Part 3), we describe an approach to modeling embedded applications represented as multithreaded applications executed on a multiprocessor platform running a number of, possibly different, RTOS.
Embedded.com (03/16/09, 03:30:00 PM EDT)
With the increasing complexity of embedded systems and the capacity of modern silicon technology, there is a trend toward heterogeneous architectures consisting of several programmable as well as dedicated processors, implemented on a single chip, known as systems-on-chips (SoCs).
As more applications are implemented in software that in turn is growing larger and more complex, dedicated operating systems will have to be introduced as an interface layer between the application software and the hardware platform.
Global analysis of such heterogeneous systems is a big challenge. Typically, two aspects are of interest when one is considering global analysis: the system functionality, in general, and the system timing and resource sharing, in particular.
As many embedded applications are reactive in nature and have real-time requirements, it is often not possible to analyze them statically at compile time. Furthermore, for single-chip solutions, we may need to use nonstandard real-time operating systems (RTOS) in order to limit the code size and hence the memory requirements, or to introduce special features interacting with the dedicated hardware, such as power management.
When implementing an RTOS, we may wish to experiment with different scheduling strategies in order to tailor the RTOS to the application. For a multiprocessor platform, we may wish to study the system-level effects of selecting a particular RTOS implementation on one of the processors.
To study these effects at the system level, before any implementation has been done, we need a system-level model that is able to capture the behavior of running a number of RTOS on a multiprocessor platform.
We refer to such a system-level model as an abstract model. In this first part on concepts and terminology and followed by succeeding parts on uniprocessors (Part 2) and then multiprocessors (Part 3), we describe an approach to modeling embedded applications represented as multithreaded applications executed on a multiprocessor platform running a number of, possibly different, RTOS.
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