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32-Bit RISC-V Embedded Processor and Subsystem, Maps ARM M-0 to M-4. Optimal PPA,
The SoC in 2020: Advances to redefine how we live
By Bill Witowsky
dspdesignline.com (December 03, 2009)
As Moore's Law shows no sign of slowing by 2020 with respect to transistor density, chip designers can be expected to create even more complex systems on chip (SoCs) compared to today's already complicated SoCs. Given that frequency and voltage scaling do not continue to scale due to power/heat dissipation, it is clear that higher performance must be achieved through a heterogeneous mix of highly parallel processing elements.
The cost to develop these SoCs will require that they can be easily repurposed across multiple applications. To achieve this, the inherent functionality of a SoC will be defined primarily by the software. We've already seen this happen with DSPs where signal-processing functions are implemented in software instead of fixed hardware blocks. With SoCs, the external interfaces, including radio technology and communications protocols, will be defined in software as well.
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