Software will be main SoC worry

Software will be main SoC worry
By Nick Flaherty, EE Times UK
February 5, 2002 (3:57 a.m. EST)
URL: http://www.eetimes.com/story/OEG20020131S0054

In five years' time, hardware design reuse will be nowhere near the biggest problem in creating system-on-chip devices, according to hardware reuse group, the Virtual Socket Interface Alliance (VSIA). The main bugbear will be software.

Larry Cooke, technical director of VSIA, said: "When we started VSIA in 1996, 90% of the design effort was in hardware. By 2006, 90% of the effort will be in software."

Michael Kaskowitz, general manager of the embedded systems division at design automation tool supplier Mentor Graphics, said: "Cellphone manufacturers now employ five to 10 times the number of software engineers to hardware engineers, and the food chain of third party software developers adds another 10 times those numbers.

"Increasing integration [of the chip] is driving more legacy software on-chip. But there is less visibility, with problems for debug and manufacturing test.

"Just as there is a case for standard ising the core IP for virtual components, the hardware ab-straction layer needs standards to increase portability."

VSIA is looking at expanding its standardisation activity to include embedded software, but objections have been raised by some of its members.

Ian Philips, senior engineer at UK processor designer ARM and a founder member of the VSIA, says there is still too much work to do on hardware IP for embedded software to yet be of such concern.

"Just sitting down for 10 minutes, I came up with 12 hardware issues that still need standardising," he said. "This is not just about software; we also have to focus on getting the infrastructure [for hardware IP] right as well."

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