The new International Technology Roadmap for Semiconductors (ITRS-2001) implores EDA researchers and vendors to develop the technology needed to support next-generation silicon. But the toughest challenges may prove to be political rather than technological.
The road map, updated every two years, is a crucial driver for the entire semiconductor industry supply chain: EDA, test, packaging and manufacturing. It's the means by which chip makers tell their suppliers what they intend to build and what technologies they need to make it happen. The 2001 map extends from 130-nanometer (0.13-micron) feature sizes in 2001 to 22 nanometers in 2016.
The Design portion of the map, contributed by the Design International Technology Working Group, is one of eight sections. Design identifies the cost of design as the greatest threat to the continuation of the semiconductor road map. With NRE mask costs approaching $1 million, the Design section notes, "design NRE" is routinely in the tens of millions of dollars.
So, what to do? The Design section is full of appeals for new technology for three "system drivers"-microprocessors, analog/mixed-signal chips and systems-on-chip. For system-level design, for instance, it calls for platform-based design, system-level estimation, formal verification of embedded software, "efficient" behavioral synthesis and a new approach to communications design.
In the category of logical, circuit and physical design, the road map calls for predictability in process variability and for an ability to model such phenomena as leakage, single-event upsets and atomic-scale effects. It appeals for analog synthesis, leakage and power management, and process modeling and characterization.
The road map calls for new tools, metrics and techniques that will allow "high-quality" verificatio n of very large chip designs. It seeks design-for-test techniques and tools that can lower the cost of testers, including "nonintrusive" built-in self-test, yield enhancement and analog/mixed-signal design-for-test.
EDA vendors are working on many of those technologies. But they may resist the strong call for interoperability. ITRS stresses the need for standard information models and interfaces, such that the EDA industry can provide customized, design-specific flows using interoperable tools.
To make that happen, the EDA vendors will need to overcome politics and cooperate on standards. The first step is to stop the infighting and get the OpenAccess API effort back on track. Technology alone will not provide what the chip makers are saying they need.