MIPI M-PHY takes center stage

By Ashraf Takla and George Brocklehurst

The curtain is up and the M-PHY specification is taking center stage, positioned to handle the many different roles required for a faster, more reliable, physical interface layer (PHY Layer) on mobile devices.

The script for the M-PHY specification was written inside the MIPI (Mobile Industry Processor Interface) Alliance by a working group made up of member companies, and set up to expand the capabilities of mobile devices by defining interface standards that will revolutionize the capabilities of the coming generations of mobile products. Faced with an explosion of mobile multimedia devices, with an ever increasing demand for faster throughput, the mobile industry, through the MIPI Alliance, has defined the ultimate PHY, one capable enough to handle the demands of mobile devices and seemingly capable of moving into several other key application areas as the PHY of choice.

MIPI and the M-PHY

The M-PHY specification is an essential part of the MIPI Alliance’s vision for new and more capable high-speed interfaces on mobile devices. Members identified early the need for a serial interface to support the ever increasing data bandwidth requirements of mobile devices. Now, pressed even further by the explosion of digital content in video, social media exchanges, and cloud computing, mobile devices require a faster physical layer interface, like the M-PHY, to remain a step ahead of the data transfer requirements necessary to give consumers the on-device response they need. Fuelled by the success of the other MIPI Standards now being deployed, the M-PHY specification is gaining momentum as it moves toward final approval as the newest MIPI specification. The MIPI D-PHY, a source synchronous interface that is currently handling the interfaces between the application processor chip and the camera or display in a mobile device, has been especially successful. Even though the D-PHY is a capable interface, its synchronous nature has speed limitations (1 Gigabit per second) that prevent it from handling the demands for higher data transfer rates. The industry requires a more powerful PHY, one that offers asynchronous data transmission and addresses the speed and signal integrity issues of high-speed chip-to-chip connections within an increasingly EMI (Electro-Magnetic Interference) sensitive environment compounded by tighter form factors, while continuing to minimize power dissipation.

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