Many chip designers use IP to improve their productivity, but unfortunately not all IP is created equal. Ed Bard, senior director of marketing, IP, and Ralph Morgan, vice president of engineering, IP, both of Synopsys, suggest that to separate the good from the bad, design teams must exercise proper due diligence when selecting IP.
As more functionality converges onto a single device, it leads to an increasing number of IP blocks on a chip. For example, a modern set-top box chip includes processor and memory IP and a growing number of standards-based interfaces including: USB, PCI Express®, HDMI, SATA, Ethernet, IEEE 1394 and an on-chip bus such as AMBA®. These standards-based interfaces are a unique class of IP for both developers and consumers.
It’s a common misperception that standards-based IP is easy to create. You can download the specification from the PCI-Special Interest Group (PCI-SIG®), USB-Implementer’s Forum (USB-IF) or any number of other standard organizations. There is even verification IP commercially available that can help you to verify your implementations. Also, since any number of small companies or consultants can develop the IP, there may be an opportunity to get a really great deal on it. However, those looking to procure IP should keep in mind that not all IP is created equal and should consider what goes into developing high-quality IP.
There is immense pressure within the industry to reduce the cost of design, and sourcing low-cost IP is an attractive option. But a design team’s choice of standards-based IP affects risk, schedule and quality for the entire chip; any compromise can spell disaster for the whole project. Design teams would do well to think in terms of total cost of ownership when they look at the business case for IP procurement.
Picking the Right IP
So, how do you go about picking your way through the plethora of IP and IP providers so that you can be confident that you are selecting great IP? There are three things that you need to determine:
- whether the IP works (its functional correctness),
- whether it works with the rest of your design and other IP (interoperability), and
- how easy it is to integrate.
Figure 1: Key elements of delivering high-quality IP
Functional correctness:Verifying IP is much like verifying any other block on a chip, except, of course, that commercial IP may end up in any chip. This means that the IP vendor has to verify all interfaces on the IP across all transaction types, and take into account all possible events and timing.
To meet the needs of a wide variety of SoC designs, IP must be configurable. The more complex the IP standard, the more configuration options it has and the harder it becomes to verify it for all possible functional interactions. To address these challenges and the difficulty of verifying modern interface protocols requires a strategy for ensuring that the initial test plan is complete, the use of sophisticated constraint random methodologies and an infrastructure for verifying and measuring coverage across the configuration space.
Interoperability: For the system designer, the real test is whether their product will communicate correctly and achieve high throughput with all other devices that it might be connected to throughout its product lifecycle. One step is to ensure that your IP vendor has a comprehensive compliance testing program. Serious IP vendors build hardware prototypes using their IP and take every major release of the IP through the relevant compliance testing to obtain certification.
Ease of integration: An IP component that is difficult to integrate can adversely affect the project schedule and increase design costs – exactly the reverse of what you were hoping to achieve. The IP vendor must take steps to ensure that the designer has everything that they need for smooth integration of the IP into the SoC, including: tool flow testing, configuration and technology dependent tool scripts and a complete set of deliverables to support the integration of the IP.
IP Due Diligence
IP that is silicon-proven is not necessarily robust. If the vendor originally designed the IP to meet a specific need, it may fall short when you attempt to use it in a new design. It’s likely that the original design team specified the part with its own particular timing budgets, test and power schemes in mind.
In this case, you need to review the IP vendor’s processes to better understand their design and coding standards. Do these accommodate different clocking and power schemes, and clock frequency scaling? Do they support a variety of test strategies? Their processes should indicate that they hold regular code reviews and use RTL linting tools, and document the results.
To assess functional correctness, you need to review the:
- Test environment spec: Is the stimulus generation for each IP interface independent? Are there any other artificial constraints on the stimulus? Can the test environment inject all types of errors handled by the protocol? Can the environment test the behavior of the IP when talking to a non-compliant interface?
- Functional coverage plan: Is it complete?
- Functional and code coverage results: Are they available, and do they achieve 100% coverage? If not, why not?
- IP verification strategy across the configuration space: Does the vendor test all configuration options, and all important combinations of options? Do they test random configurations? Will they run complete regressions of the specific configurations that the design will use?
Checking interoperability has become easier now that many standards organizations provide compliance testing, plug fests and certification programs. IP vendors should be able to show that their IP is compliant – but that alone doesn’t guarantee that it will interoperate with non-compliant devices already in production. There are many devices on the market today that do not adhere to protocol specifications.
Aside from having the appropriate certification, there are some key indicators that you should look out for when assessing interoperability.
- IP vendors that have been involved in the evolution of the specification have a better insight into the motives for including particular protocol features, and can usually do a better job of interpreting the specification.
- IP vendors that have comprehensive compliance testing programs in place will usually take each major release of an IP through compliance testing for certification.
- Mature, silicon-proven IP that is already in volume production will have a greater chance of interoperating with a broad range of devices.
- IP vendors that offer a complete solution – for example, controller, PHY and verification IP – will have taken the entire solution through compliance testing. Compared to sourcing these parts independently, procuring a complete solution from the same vendor will reduce your interoperability risk.
Check-out Your Vendor
Even highly talented design teams may not have the experience needed to develop high-quality IP. You should ask your prospective vendor about its relevant experience. Some key points to check include its involvement in standards bodies, the number of times its IP has been successfully integrated and taped out, and its compliance successes.
Communications interfaces are complex. Chances are that you will need some support in case things go wrong or implementation advice before you begin to integrate the IP. Does the vendor offer support from people in your time zone who know and understand the IP? If they don’t, you should factor this into your project timescales.
Best Practice for IP
We have put the above recommendations into practice within our DesignWare® IP Group. To ensure functional correctness, we have invested in a regression infrastructure that allows us to test across configurations specified by our customers. We also test random configurations and maintain an archive of customer configurations. We run 35 billion – 40 billion cycles per day on IP core regression tests. That requires us to have 500 CPUs running regressions continuously. We participate in over 22 standards bodies and our IP experts contribute to many of the standards specifications. We have integrated our USB IP more than 1,600 times and our PCI Express IP more than 275 times. Between them, our customers have over 300 certified chips that use Synopsys IP. The Synopsys team has passed certification over 100 times itself. Each time we learn something new, we update our design practices or processes to improve them.
As standards become more complex and designs become larger, choosing the right IP becomes more critical to the overall success of the project. You should insist on having a commitment to quality from your IP vendor – your success depends on it.
Ed Bard is a senior director of product marketing, for DesignWare IP team.
Ralph Morgan is vice president, engineering, for DesignWare IP.