2.5D GPU / 2D & 3D Vector Graphics (OpenVG) Accelerator - D/AVE HD
How to manage software development for startups
Osborne Hardison
EETimes (11/15/2004 4:54 PM EST)
Even if you're not involved in a startup, these best practices for running a small organization on a tight budget may help you critique your own organization. How to hold meetings, what tools to buy, and what to skip—it's all here straight from one who's learned the hard lessons.
Although software-development processes are numerous and well documented, they don't always fit the time and resource constraints of an embedded systems startup company. Often a startup's software team follows a leaner path to achieve their goal: get a product out on time with no major defects. These teams frequently use public-domain tools and a mix of hybrid software development life cycle techniques, but there are as many nuanced processes as there are embedded systems startups.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
Related Articles
- How the Ability to Manage Register Specifications Helps You Create More Competitive Products
- How to manage changing IP in an evolving SoC design
- How to use snakes to speed up software without slowing down the time-to-market?
- Processor-In-Loop Simulation: Embedded Software Verification & Validation In Model Based Development
- Managing the complexity of embedded software development through design automation tools
New Articles
- Beyond Limits: Unleashing the 10.7 Gbps LPDDR5X Subsystem
- How to Design Secure SoCs: Essential Security Features for Digital Designers
- System level on-chip monitoring and analytics with Tessent Embedded Analytics
- What tamper detection IP brings to SoC designs
- RISC-V in 2025: Progress, Challenges,and What's Next for Automotive & OpenHardware
Most Popular
- System Verilog Assertions Simplified
- Beyond Limits: Unleashing the 10.7 Gbps LPDDR5X Subsystem
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- Optimizing Analog Layouts: Techniques for Effective Layout Matching
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)