PLD reconfigurability has long been used in the development phase of the design cycle to realize several iterations of working hardware in the shortest amount of time. This feature greatly shortens the design cycle when compared with similar implementations with discrete components or custom ASICs. PLD reconfigurability is also used in the initial manufacturing phase of a product to make bug fixes or meet specific customer requests.
Currently, designers are discovering that PLD reconfigurability can extend further into the product's lifetime as well, allowing major enhancements to functionality. With the aid of PLD in-field reconfigurability, designers can build highly integrated systems that can be modified during operation to meet a variety of tasks while installed at a customer's site. Some of the enabling technologies for this include the capability to reconfigure PLDs over a variety of communications media, including LANs and the Internet. Additionally, the recent availability of microprocessor cores for PLDs allows greater integration of functionality. It also provides opportunities to build configurable systems that tackle different applications via sets of custom peripherals and co-processors.
Programmable logic-based reconfigurable systems can be found in a wide array of application areas, ranging from those that take on minor modifications to those requiring systems that can become entirely different products. A t one end of the spectrum might be a packet-processing design that alters its traffic policies based on different traffic conditions. At the other end might be a DSP-based video processing product that can change the coefficients used by its finite impulse response filters, the bit width or number of taps in the filters, or the types of filters it employs to provide altogether different functionality.
The mechanism for controlling the functionality of these PLDs is their programming information. The typical PLD application uses a single programming file that contains the information to configure or program the PLD, but reconfigurable PLD-based systems use multiple programming files, each corresponding to a different mode of operation for the programmable device.
Today's most common high-capacity PLDs are SRAM-based-meaning that they can be reprogrammed-and operate within hundreds of milliseconds. The programming files corresponding to the different PLD configurations can be stored in-system or downloaded to the system via a communications channel. Those systems also need some type of reconfiguration host to control the programming of the PLDs, generally a microprocessor or microcontroller. With the recent availability of embedded processor cores for PLDs, designers can achieve new levels of integration, incorporating even the configuration host into the programmable device.
Many digital systems consist of one or more microprocessors coupled with off-the-shelf and/or custom devices. The processor provides some management and control functions, and the other components provide memory and other functions related to the overall product's end application. In some cases, the processors also provide mathematical or digital functionality. The decision to implement functions with either processors or with dedicated components usually hinges on performance. For any given function, processors cannot match the performance of hardware devices that are dedicated to performing the same function.
Accordingly, a large part of a system designer's task is to partition the functions required of the system across the system's devices, while meeting performance and budgetary requirements.
With the advent of processor cores for programmable logic, systems designers now have the opportunity to easily explore the trade-offs between implementing functions in the processor and implementing them with dedicated hardware functions such as co-processors or custom peripherals. With multicomponent systems, such exploration can be costly and time-consuming, especially if boards need to be modified to accommodate design changes.
With custom ASICs, those design trade-offs can be simulated, but hardware implementation requires several weeks of fabrication before prototypes are available. Using programmable logic, systems designers can investigate several design versions and test the results with functioning hardware in the same time it takes for a single custom device to be fabricated.
After those different design configurations are investigated and proven in the development stage, the PLD programming files corresponding to them can be stored and programmed into the system's PLDs as needed for the various operational modes of the product. For example, in one mode, co-processors A and B operate upon the data passing through the system. In another mode, co-processors C and D operate upon the data. In that way, embedded designers can achieve with a variety of operations the kind of hardware-accelerated performance normally associated with application-targeted processors or custom instruction sets, while retaining platform-independent code.
Using an embedded processor in a PLD allows a designer to easily build a system that can be examined and reconfigured by an external agent such as a remote user or intelligent controller. For example, one such system allows new configuration files to be downloaded from the Internet. The new programming file is programmed into the flash memory by the embed ded processor. The flash memory also contains an alternative configuration file and a boot block for the processor. The alternative configuration file is a "known-good" configuration that the system relies upon in case of an interruption during device programming. The use of nonvolatile flash memory to store the known-good configuration file and boot block ensures that they will be retained in the event of a system disturbance. That will allow the system to recover if the SRAM-based PLD loses its programmed configuration information.
To allow remote users to examine the configuration of the PLD, the embedded processor can serve a small HTML page to the user's Web browser. To accomplish this, the embedded processor needs a real-time operating system kernel, TCP/IP stack, Web server and default HTML page, all of which reside within the boot block. When the system PLD is to be reconfigured, the embedded processor directs the configuration-management PLD to select the appropriate configuration file from the flash memory and send it to the JTAG port of the system PLD.
The configuration-management PLD then initiates and completes the configuration process. If the process fails, the configuration-management PLD can attempt to reconfigure the system PLD with the known-good configuration file. In either case, the embedded PLD can serve an HTML page to the remote user, informing them that reconfiguration succeeded. Many of the elements required to build such systems are readily available from PLD vendors.
The combination of increased PLD capacity and capability along with the historic advantage of reconfigurability allow designers to build complete systems that can change in-system to meet a wide array of conditions. Using PLDs to build reconfigurable designs achieves the kind of dynamic system operation found in software approaches, while maintaining hardware-level speeds.