Flexibility vs. speed has been a basic theme running through the various generations of the computer industry. The original rationale for the stored-program computer was the ability to reprogram an expensive piece of hardware for a variety of problems. The idea worked well enough to launch an industry, but the problem of how to maximize both performance and flexibility has become a permanent fixture of design as computational power has expanded.
Contributors to this week's focus on configurable platforms once again tackle this fundamental design dilemma, using the latest tools and the wide-ranging process
opportunities of the system-on-chip (SoC) generation. Oddly, despite decades of experience with algorithms, operating systems, circuit and device types, the problem appears to be as durable as ever. The latest IC generation, with its ability to put more functions than ever onto a single chip of silicon, provides an interesting are na for trying out different mixes of processor, DSP, programmable logic and various memory types to achieve some design goal. One major theme that is evolving from this work is the new opportunities that configurable logic offers to solve the performance/flexibility dilemma.
| DSP designers: Throw out your standard texts, advises Paul Master, VP of technology at QuickSilver. A fresh approach to the subject allows designers to take advantage of recent configurable processor developments. |
The rising expectations for handheld, multimedia-capable products provide an excellent test case for that kind of design trade-off. As Paul Master, vice president of technology, QuickSilver Technology Inc., (San Jose, Calif.) observes in his article " ...OEM handset engineers are e xpected to encounter major design issues, even armed with today's most advanced DSP technology." In particular, the MPEG-4 streaming video standard cannot be tackled with current off-the-shelf processors, at least with the power and size budget of a handheld device.
At the heart of the MPEG-4 format is the venerable Fourier transform, which is implemented digitally in the discrete cosine transform (DCT). "The problems lie squarely in the fact that both DSP and ASIC implementations of such algorithms as DCT are inflexible," Master says.
One company trying to define a new relationship between performance and flexibility is Improv Systems Inc. (Beverly, Mass.), which is offering its Jazz architecture based on configurable processing and a very-long-instruction word (VLIW) compiler.
While Improv's Jazz approach attempts to build configurability into the heart of a processor's architecture, another tack being pursued by some companies is to take a more or less standard microprocessor arc hitecture and build configurability into the instruction set of I/O functions. One example is the configurable processor core, which is predesigned and dropped into a SoC circuit. As Jim Turley, vice president of marketing at Arc Cores Ltd. (San Jose, Calif.) explains: ". . . an overlooked advantage of configurable processors is the architectural flexibility they provide to designers." Perhaps the ultimate in configurability is programmable logic devices from companies such as Xilinx Inc. (San Jose, Calif.) and Altera Corp. (San Jose), which are both represented here.