SoC drives DSP intellectual capital
SoC drives DSP intellectual capital
By Shiv Balakrishnan, General Manager, DSP Business Unit, HelloBrain.com, Santa Clara, Calif., Robert E. Owen, Consultant, Data/Time International, Saratoga, Calif., email@example.com, EE Times
April 18, 2000 (10:26 a.m. EST)
There is no shortage of digital signal processing applications that need the economic benefits of system-on-a-chip design today. Consumer communications and multimedia products are huge businesses and DSP is at the heart of most wireless digital appliances and most of multimedia exists because of DSP compression technology. All of these are mass marketed and are under constant pressure to lower power and price while improving performance through higher levels of chip integration.
The move to SoC designs has had a profound effect on DSP system designers. Instead of dealing with a single discrete processor with a simple programming space that they control and standard peripherals arrayed along a single bus, they now need multiple processors in forms they can lay out on a chip and program with constantly changing software functions. In addition, needed are complex peripherals, including mixed-signal ones, that conform to new standards on buses that are often of someone else's specification.
In a common SoC configuration, a microprocessor core is purchased as an RTL synthesizable module with peripherals and custom circuits added by the designer. Likewise, user-written software is added to standard library functions or modules for control and interface operation. Signal processing is handled by a DSP core with its own special peripherals and processing algorithms. Since both processors are standard products they come with their own support tools for both software generation and system simulation, emulation/test and debug.
Integration of this type to produce a system on a chip can work well. Important to its success is an underlying network of standards between platforms. Two of the major ones are the RTL description of the circuit elements for synthesis and simulation and the C language functions for code generation and simulation for both control and numeric results. These standards permit the hardware and software modules to move freel y between design environments. The intellectual property in the modules is the value actually purchased from the vendors. There is also significant value too in the platform tools of the design environments.
But problems arise for the designer when all of the needed peripherals, software modules, algorithms and tools do not come from one vendor with its fully integrated design environment. This is, of course, the more common case because of the profusion of evolving standards, new processors, better algorithms and changing markets. In less dynamic times these gaps could be filled by internal staff developing the needed circuits, software or algorithm modules. But shortages of personnel with the needed skills, shorter and shorter product design and shorter life cycles all conspire to require help from outside vendors. These vendors may provide the needed existing intellectual property or the design service to create it.
We call these two forms collectively intellectual capital. Much of the ad ditional load of SoC design comes not just from the individual module designs but from the integration, testing and verification process of multiple modules. This forms an expanding pyramid where each new design creates new need for integration, translation or conversion, testing and verification products or services as the process moves down. The design of one module may be straightforward to test for correctness and speed by itself in its own design tool environment. But when it is integrated with another module in another environment, it may need substantial conversion and translation of the fundamental design as well as the models to simulate, test and verify its operation with another module in a system. Many small vendors thrive on supplying the know-how or intellectual property to solve such arcane systems design problems.
There are today a substantial number of sources of DSP-related products and services to help the SoC designer. We view them all as intellectual capital that is moved into th e system design space. The three basic intellectual capital classes are hardware, software and services. DSP hardware is primarily the hard or soft macros or modules for the core processors, memories, peripherals and mixed-signal interface elements of the chip. It can also be full ICs like codecs and even board-level products used for prototyping, simulation or verification. In each case the link is the intellectual DSP content that relates to other common properties of the completed SoC.
Who actually supplies DSP intellectual capital ? The large pieces can come from the giants likes Texas Instruments or Cadence Design but just as likely from the much smaller companies such as Clarkspur Design or Frontier Design. Services are more likely to be from smaller operations with a specialization. With DSP being a new technology with strong academic roots it has a wider geographical distribution. Given a PC with Web access and some tradition of English, research centers have flourished worldwide, contributi ng to DSP design. In fact, "DSP Valley" is in Belgium, and ISS in Ireland was one of the earliest to provide DSP IC intellectual property. What all but the largest lack is a marketing presence or awareness with their natural user community of DSP SoC designers.
The traditional marketing connections between DSP suppliers and potential users exist only for the large established suppliers like Texas Instruments or Analog Devices. But of course the Web has begun to level the playing field. It is a natural connection for most of the sources of DSP assets because of the academic greenhouses where most have taken root. Also on the user side, only the more aggressive broader perspective engineering managements take on such complex developments-and they are very likely to attempt to locate and use resources on the Web.
The Web does not only provide for making initial marketing contact but it facilitates the collaborative interchange needed for the complete solution. The in tellectual capital actually can be delivered and paid for over the Web. It is the large transactional arrow in the center of the figure. Many public DSP resources are already shared on the Web in these application areas, particularly standards. Increasingly, there are market makers to facilitate the exchange. The first were broad university-centered ones, such as Design Reuse in Grenoble, France, that built on the shareware spirit of these research environments. More recently commercial companies have brought a business orientation with more attention to matters of security, financial accountability and verifying complete end solutions.
One of the new vertical areas of design expertise concentration is DSP. Established third-party technical resources such as Berkeley Design Technology already exist in the DSP field to oversee and referee the technical integrity of these transactions independently, if necessary. The existence of these new collaborative designs with intellectual capital may very well be key to the DSP SoC becoming a widespread reality rather than just a technical tour-de-force of a few large corporations.
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