Clive Maxfield, EETimes
4/4/2011 11:22 AM EDT
It’s no secret that electronic designs are becoming ever more complex. I used to think things were hard enough back in 1980 when I was designing my first ASIC as a gate-level schematic using pencil and paper. Looking back, however, I realize life was a doddle and I had things easy – all I had to worry about was making sure the logic was functionally correct and would fit in the device (a gate array containing 2,000 equivalent gates) and that the timing was OK, which wasn’t particularly taxing since our system clock was sub-1MHz and we had lots of slack to play with.
We didn’t even think about things like leakage power and dynamic power consumption. Now, of course, we’re talking about designs containing millions upon millions of logic gates, including humungous blocks of third-party IP, more processor cores and hardware accelerators than you can swing a stick at, with millions of lines of software thrown into the mix.
So how do we ensure the quality of all aspects of an electronic design, including hardware (digital, analog, mixed-signal...) and software (boot code, test routines, firmware, drivers...) for anything from FPGAs and SoCs to full-blown embedded systems?
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