Ron Wilson, EETimes
8/24/2011 12:48 PM EDT
An easy conclusion from the annual Hot Chips conference this year is that multicore is becoming many-core. While the PC and server markets gradually evolve from four to six or eight massive x86 cores, Hot Chips papers suggest that the rest of the world is moving in a different direction: large numbers of relatively simple CPUs. But the trend is reinforcing a long-appreciated set of questions—as the number of cores grows, how do you deal scalably with interconnect, memory hierarchy, coherency, and intra-thread synchronization? Answers to these questions depend on the size of the design, the application space, and the heritage of the design team. Solutions at Hot Chips ranged from the elegantly—and perhaps overly—simple to the rococo.
At the large end of the spectrum was Cavium, describing the 32-core Octeon 68xx family of network processing ICs (figure 1.) The family claims its place in the many-core trend by using up to 32 identical MIPS64 cores. The individual cores are relatively simple dual-issue, in-order designs with some networking-specific extensions, according to Cavium fellow Richard Kessler.
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