LVDS modeling techniques overcome Ibis inaccuracies
By Adam Tambone, Modeling engineer, >Interface and Logic Modeling Group, Fairchild Semiconductor, South Portland, Maine, EE Times
April 3, 2002 (5:22 p.m. EST)
I/O Buffer Information Specification, or Ibis, models have become an important signal-integrity simulation tool, because designers prefer the easy access and simplicity these models provide. Ibis models are often used in place of Spice models because they are easier to transport and are several orders of magnitude faster to run. IC vendors are also more willing to release Ibis models of their devices, since they do not reveal proprietary information. In addition, simulations with Ibis models are more likely to converge than simulations with Spice models.
However, when created with standard methods, Ibis models for simulating low-voltage differential-signaling (LVDS) drivers are frustratingly inaccurate and unreliable predictors of circuit performance. This is because Ibis does not contain a true differential-buffer model type. As system designers have begun turning to differential I/O to meet higher throughput requirements, this has sparked a de mand for LVDS Ibis models that will perform reliably in system-level simulations for signal integrity.
A new methodology has been found for creating accurate LVDS Ibis models primarily by employing a dependent voltage source while obtaining the dc and transient data that defines an Ibis model. Described simply, an Ibis model is a simplification of dc (current vs. voltage) and transient (voltage vs. time) data taken from the device being modeled. This data can be collected through either laboratory measurement or by simulation of the Spice model representing the device. Once created, the Ibis model can be used by electronic design automation tools to create a behavioral model of that device. The behavioral-modeling process is proprietary to the EDA tool, and is based on the information contained in the Ibis model itself. In this sense, an Ibis model can be more accurately described as an Ibis data sheet.
For generating LVDS models, Spice-to-Ibis translation is often less costly and time-consu ming than empirical methods. Spice-to-Ibis translation is the preferred method for model creation not only because it is faster, but also because it more accurately represents process variations (cross-temperature, typical, slow and fast).
To model an output buffer within Ibis, the dc and transient data should include a pull-up and a pull-down curve, and rising and falling waveforms. Once this data is collected through Spice simulation, it will be formatted and included in the Ibis model representing the output buffer being modeled.
The pull-up and pull-down curves are defined by the I-V (current-voltage) characteristics of the output buffer when it is fully in the logic-high state and logic-low state, respectively. During simulation, the device is driven to both of these states and a dc voltage source on the output node of the device is then swept from - Vcc to twice +Vcc in each case. For each incremental voltage step in the sweep, the corresponding current at the output is measured. Com bined, this dc data will define the dc output levels of current and voltage of the output buffer being modeled as well as model the nonlinear output-resistance characteristics of the device.
The rising- and falling-waveform data describes the volt/second characteristics of the output buffer. A ramped input stimulus is used to drive the output to a logic high for the rising waveforms and to a logic low for falling ones. In each case, voltage vs. time data is gathered. Collectively, these waveforms model the shape of the rising and falling edges over a range of conditions in simulation. The output-voltage levels defined in the transient data should also correlate to the output-voltage levels as defined in the dc data.
These standard methods of obtaining Ibis data work well when modeling a driver device with independent outputs. For example, a single-ended TTL output buffer drives a signal with one output. But the LVDS driver has two outputs inverting and noninverting drivin g two signals, which depend upon one another and act collectively as one.
In the LVDS device, the inverting and noninverting outputs will always attempt to maintain a constant voltage of twice the offset voltage (2VOS) between the outputs as the output voltages vary. Typically, VOS is 1.25 V. For example, when the noninverting output of an LVDS device has an output voltage of 1.5 V, then (through compensation by the internal circuitry) the voltage at the inverting output will attempt to reach 1 V so that the sum of voltages between the outputs is equal to 2VOS or 2.5 V.
Since the I-V and voltage/second characteristics of the inverting and noninverting outputs of the LVDS driver are dependent upon each other, data from one output must be gained in a way that accounts for the opposite output. The standard Ibis methods do not account for this interdependence. It is therefore necessary to establish an alternative method for the data of these outputs.
This can be accomplished with the u se of a dependent voltage source designed to be a function of the dc voltage source that's being swept on either output of the LVDS device being modeled. For example, to gain data for the noninverting output buffer of the LVDS device, a dependent voltage should be placed on the output of the inverting output buffer so that a constant voltage equal to 2VOS can be maintained between the inverting and noninverting outputs.
Designing and instantiating a dependent voltage source can be readily accomplished in HSpice by using the polynomial for a voltage-controlled voltage source. Dependent voltage sources can be implemented in most EDA tools. The purpose of implementing a dependent voltage source is to maintain constant voltage equal to 2VOS between the outputs.
While HSpice will be slightly different, the relationships for the voltage-controlled voltage sources are the same for inverting and noninverting outputs of an LVDS driver. For obtaining data from the noninverting output, it's necessary t o place the following dependent source on the inverting output. In theory, if one is generating Ibis models by obtaining data from HSpice simulation, then at best the Ibis model can only be as accurate as the source HSpice model itself. For this reason, the verification of the LVDS Ibis model as accurate will be determined by how well it correlates to the source LVDS Hspice model it was derived from.