Matt Romig and Vikas Gupta, Texas Instruments
EETimes (2/22/2012 12:59 PM EST)
The increasing opportunities and requirements for system-in-package (SiP) technologies have become a driving force in the electronics and semiconductor industry. A number of companies are focused on maximizing the benefits and meeting the challenges that SiP brings.
Some SiP technologies, such as wirebonded multichip modules and advanced MCMs, have been around for decades; others, such as package-on-package stacking, are more recent. Such newer technologies as 2.5-D interposers and 3-D through-silicon via (TSV) can bring new challenges along with new capabilities.
Depending on the design and application space, SiPs can:
- improve performance with tighter integration and co-design;
- increase power efficiency, with shorter data transmission channels;
- enable heterogeneous integration via different technologies;
- lower total cost by reducing the system size and bill of materials (BOM);
- reduce complex system-on-chip (SoC) development for shorter time-to-market; and
- miniaturize devices by stacking components, vs. side-by-side layout.
But SiP products also have unique challenges.
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