William Ruby, Apache Design, Inc.
EETimes (4/20/2012 10:22 AM EDT)
Power is a daunting challenge for modern system-on-chip (SoC) designs, from both the power consumption and power integrity perspectives. Achieving low-power, from mobile and wireless designs to consumer devices to high-performance networking and computing applications that face power supply and cooling limitations, is now critical to design success. At the same time, rising complexity and chip-level power management techniques make power integrity analysis from chip-to-package-to-system essential. Designing for low-power and power integrity is not automatic – there is no “low-power” button. This article describes a holistic design for power methodology that spans from architectural decisions through front-end design to physical implementation and sign-off.
Power is a key challenge in modern IC designs for various applications. The power challenge is comprised of two fundamental aspects: power consumption and power integrity. From mobile and wireless designs where extending battery life is essential to product competitiveness, to consumer devices with package cost constraints, to high-performance networking and computing applications facing power supply and cooling limitations, reducing power consumption is now mission-critical. At the same time, rising design complexity and the use of chip-level power management techniques such as power-gating is forcing design teams to ensure power integrity from chip-to-package-to-system. A modern system-on-chip (SoC) design flow consists of many steps including various levels of abstraction, from system-level and architectural design to detailed physical implementation. Power considerations are important in every step of the design flow, however, only at the high levels of abstraction – at the architectural and hardware design register-transfer-language level (RTL) – are where a significant impact on overall power consumption can be achieved. In order to manage both power consumption and power integrity effectively, design teams must adopt a holistic design-for-power (DFP) methodology, spanning architectural decisions through front-end design to physical implementation and sign-off.
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