The Case for Developing Custom Analog

Custom analog SoCs - real option for more product managers.

By Donnacha O'Riordan, Director of Services Strategy at S3 Group

1. Abstract

The reduction in fabrication costs now makes custom analog SoCs a real option for more product managers. All the advantages afforded by SoCs - including secure innovative designs with differentiating features - are now available to a wider range of products. In this paper these advantages are placed alongside the potential savings in BOM and illustrate a strong business case for investment in SoC. Three recent custom analog SoC designs, where meeting serious technical challenges resulted in significant cost per unit reductions, are described. These reductions against projected sales made the SoC solution the smartest business decision. Going the SoC route is not without its risks, so partnering with a proven SoC design house that brings knowledge of available IP and experience of subsystem development makes sense.

2. Introduction

Custom analog SoC (System on Chip) designs are now a real option for many system houses and OEMs who previously found such designs outside their budgets. The reduction in fabrication costs for older node processes (especially at 0.18μm and 0.13 μm) and the availability of proven mixed signal IP cores and subsystems, mean that a SoC solution can in fact deliver significant savings on the BOM (Bill of Materials) making the previously unjustifiable expenditure on NRE (Non-recurring Engineering) costs now recoverable in very short timeframes (in the order of a single year), even with relatively low volume products.

This paper describes how SoC solutions enable the production of smaller, lighter and more efficient products whilst affording the additional opportunity of incorporating differentiating features in a more secure way. The business case making the SoC route viable is shown, focussing on the recent shift in the fabrication costs that have emerged as process node advances have left foundries with spare capacity at older node technologies. This, combined with the potential savings afforded by an integrated design, can result in hugely significant savings on the BOM, enabling a return on NRE very early. The business case for three recent SoC solutions, shown alongside the technical challenges met, illustrate how investing in a SoC design now makes sense for new product development. Finally, this paper considers how the challenges posed in the development of SoC solutions can be met through partnering with an innovative design house with a proven track record.

3. Why use a Custom Analog SoC

SoCs are ICs where all the components of an electronic system are integrated onto a single chip to meet a specific application need. A system may contain analog, digital, mixed signal and often radio frequency functionality, integrated with an advanced processor and built-in memory blocks. Designing such systems on a single chip (SoC) enables smaller, lighter, more reliable and power efficient systems become a reality. More analog is now being moved into single SoCs presenting the challenge of integrating analog functionality in low geometries with complex digital functionality. But with architecture analysis and careful re-use of silicon proven IP “big A, small D” (big Analog, small Digital) SoC solutions are realizable and so too are many of the following advantages.

Lower Unit Costs

The cost of discrete components can become very expensive as performance demands increase. It makes sense to consider the potential savings that can be gained by replacing many discrete components with a single SoC incorporating RF & analog or mixed signal IP which can be customised for specific application requirements.

Differentiating Features

Custom analog SoC designs allow designers to include unique features that may not have been available, or have previously fitted, with discrete components. This gives the product managers an opportunity to increase competitive differentiation of their products through the addition of higher performance functionality.

Security of Design

Reverse engineering has long been an unwelcome element in the world of electronics. Using custom analog SoC designs makes reverse engineering significantly more difficult, more expensive and a much lengthier affair. This gives the advantage of having a differentiated product on the market for much longer before competitors have an opportunity to copy or compete.

4. The Business Case for Custom Analog SoC

Bringing these systems to production is now a real option for system houses and OEMs outside of the high volume consumer world for a variety of products including healthcare devices, industrial controllers and home appliances. Previously the balance between production costs and the NRE costs of a SoC design made this option unaffordable, but with the fabrication costs significantly reduced for designs at older process nodes, and the availability of proven IP that accelerates development schedules and lowers risk, that balance has now changed in favour of incurring those NRE costs even for low volume products.

Spare capacity at foundries

An insatiable need for higher integration and lower unit cost forces high volume consumer products (smartphones, tablets) to the most advanced process nodes (28nm ramping in 2012) and, in doing so, has freed up capacity in what are now mature process nodes (0.18μm and 0.13μm). In an effort to maintain fab utilization, manufacturers have lowered mask costs, in some instances quite significantly.

In 2010 the GSA Wafer Pricing Survey (GSA, 2010) confirmed this and stated that the average mask set pricing for 200mm wafers manufactured at 0.35μm, 0.25μm, 0.18μm and 0.13μm had generally decreased year after year, with 0.18μm posting the largest decrease of 57% in Q3 2009 over Q3 2006. In Q3 2009, average mask set pricing for 300mm wafers manufactured at 90nm decreased 22% over Q3 2008.

There is clearly now an opportunity for OEMs that traditionally could not have justified SoC development NRE to do so targeting process nodes at 90nm and higher.

Reduced BOM (Bill of Materials)

These more affordable fabrication costs, coupled with the cost saving possibilities achievable through more integrated designs afforded by SoC, means that products can now be produced with large savings to the BOM. These large savings on the BOM cost mean that even with relatively low volume production, the NRE costs are recovered early.

Using as an example an NRE cost of $2 million - a useful rule-of-thumb cost for a relatively complex SoC design taking approximately 12 months development time - where a BOM saving of $40 per unit is achieved this NRE cost is recovered once

volume sales exceed 50,000 units. Figure 1 illustrates this across different volume of sales and for different BOM savings per unit.

Figure 1. Potential Additional Profit over Product Lifetime

5. Three Examples Examined

The following 3 examples demonstrate how 3 products, previously achieved through discrete component designs, were redesigned to custom analog SoCs. Each case brought its own set of technical challenges which were met through innovative use of available analog and mixed signal IP and the experience of well-established engineering teams. The significant BOM reduction made the business case for each of these product managers.

5.1. Satellite Phone Handset

This customer saw the opportunity to develop a much smaller and more convenient device – going from a back-pack sized unit to a candy-bar sized unit. The goal became re-architecting the system into a 2 chip solution. Work centred on the re-design of the radio transceiver from the RF through analogue baseband and DSP while retaining compatibility with the existing satellite and ground infrastructure. Based on proprietary RF protocols and minimising design risk, an advanced RF SoC platform was developed that not only exploits the latest proven silicon technology, but also incorporates the flexibility to facilitate future product developments. This required an ability to look at the whole system and understand the design space and critical constraints.

The resulting RF SoC platform removed the requirement for expensive external components including IQ demodulators, IF transceivers, 14-bit ADC & DAC, linear regulators, temperature sensors and auxiliary circuits, reducing the PCB complexity, size and simplifying the product design. On the baseband processing side a much more efficient and simplified processor and DSP solution was employed and customised to the application, removing the need to use standard ASSP parts, which were overly complex providing processing power far in excess of what was required for the application.

In all over 400 components were removed from the bill of materials, and the solution consisted of:

• A digital baseband processing SoC replacing 200 discrete components with an estimated saving of $30 per unit.
• An innovatively customised RF & Analog IC replacing 200 components at an estimated saving of $33 per unit.

This redesign saw, in addition to a much improved feature set and lower power requirements in the new product, a reduction in BOM and product design complexity which made the NRE costs recoverable in the second year of projected sales.

5.2. Satellite Phone Modem

This example highlights the advantage of working with long term strategic design partners, capable of developing a roadmap of product improvements. The same Satellite Phone Handset customer realised further system cost efficiency through a redesign of the power management/power amplifier system which permitted the use of lower cost external power amplifiers.

A proven design methodology using a combination of a top down and bottom up design allows for efficient system partitioning while enabling optimization of performance at transistor level. Use of proven design and review processes based on Verilog AMS modelling, facilitates the bottom up and top down to merge effectively and ensures adequate verification of the design prior to tape-out.

The RF & Analog IC incorporates an LNA (low-noise amplifier), PA drivers and RF mixers. This combined RF & Analog IC, with the new Power Amplifier cost options achieved at an estimated unit cost saving of $30, made the NRE costs recoverable in the second year of projected sales. Additionally, the reduction in the BOM reduced product design complexity and simplified the supply chain, enabling further cost savings.

5.3. Wireless Communication Device

Hitting a particular market price point was the major challenge for this customer. They were able to realize the objective with a single chip RFCMOS IC. Through a reduction of over 610 components, the customer was able to achieve an estimated per unit saving of $77.

Integrating high switching frequency DSP cores and other digital functions with sensitive RF blocks such as SAW filters, LNAs and Mixers and high performance PLLs on the same substrate was the technical challenge as a balance needs to be struck between maintaining high performance and noise isolating to ensure robust functional performance. Leveraging silicon proven subsystem IP which has been optimized for power, performance & robustness, ensures that risk is significantly reduced and development time shortened, in turn reducing the development NRE.

Even with the modest product volume expected such significant savings on BOM enable this customer see a return on investment in the second year.

6. How Best to Achieve

The complexity of SoC designs means that partnering with a proven SoC design house lowers the risk and provides a faster time to market. The ideal partner has experience of innovative SoC designs, understands the system components and various CMOS process options and knows which available analog and mixed signal IP will benefit the implementation. S3 Group brings 25 years of such experience and engineering expertise and strong relationship with semiconductor foundries and fabless ASIC suppliers. As well as having a comprehensive portfolio of silicon proven RF and mixed-signal IP, S3 Group uses its platform and subsystem development knowledge to help partners find solutions that enhance their product development roadmaps. SoC solutions must be designed for manufacturing and verified to the highest level - S3 group has the experience to look at the whole system and to understand the critical constraints. Working with an experienced and proven partner with a clear understanding of the development process makes an innovative solution that meets the necessary cost reductions a real possibility.

7. Conclusion

System houses and OEMs can now realise their products in custom analog SoCs in a timely and affordable way. The shift in fabrication costs for lower process nodes has made SoC designs a real option as when balanced against potential savings in BOM per unit the NRE costs are shown to be recoverable very early even at low product volumes. Innovative SoC solutions are a challenge but one where additional features can be realized in smaller, lighter, more reliable systems with greater security.

Partnering with a design house with a clear understanding of all the system components and of the various technology options for implementation will help realize the silicon development in a cost effective and low risk manner.

8. About Author

Donnacha has over 16 years’ experience in the IC design industry and is currently the Director of Services Strategy at S3 Group where he is responsible for expanding & accelerating the services development activities, ensuring alignment of Services, IP and Product roadmaps and the development of strategic relationships across the whole silicon value chain.

About S3 Group:

S3 Group delivers IP and professional services to OEMs, system vendors and semiconductor companies. The company is the longest serving independent service provider in the industry, building a wealth of experience and engineering expertise over the last 25 years. In addition to design services the company has a comprehensive portfolio of RF and mixed-signal IP. The IP portfolio includes high performance ADC and DAC converters, PLLs, Analog Front Ends (AFEs), Power Management, RF Transceivers and other miscellaneous circuits which have been silicon proven at a number of silicon foundries (TSMC, GlobalFoundries, UMC, SMIC, IBM, Tower) at nodes ranging from 180nm to 40nm and below. Global end markets served by S3 Group clients include Wireless and Wireline Communications, Digital Broadcasting, Imaging, Solar, Green Energy and Industrial. Founded in 1986, S3 Group, headquartered in Dublin, Ireland, focuses on three business areas: Semiconductor, TV Technology and Telehealth, and has development centers in Ireland, Poland, the Czech Republic and Portugal with sales offices and representatives worldwide.

For further information please visit www.s3group.com/silicon