IP Integration - Size Matters! - Reducing the size of a USB 2.0 device core
By Tom Halfhill, ARC International
Embedded System Engineering
www.esemagazine.co.uk
How a System Perspective Slashes the Size of a USB 2.0 Device Core
USB 2.0 is a dramatic improvement over USB 1.1. Among other things, it's 40 times faster and has new flow-control features that use bus bandwidth more efficiently. Yet it's fully backward-compatible with existing USB 1.1 products. This combination of higher performance and broad compatibility almost guarantees that USB 2.0 will succeed in the marketplace -- a market that has already embraced USB 1.1 in personal computers, peripherals, digital cameras, industrial equipment, and many other applications.
Related Articles
- USB 2.0 PHY Verification
- Low Power USB 2.0 PHY IP for High-Volume Consumer Applications
- Significance of standardized, interoperable, proven and integration ready stacks for mass adoption of next generation smart surveillance systems
- Mixed-Signal Verification for USB 2.0 Physical Layer IP
- Case Study: Annotating OVL 2.0 with SVA Assertions
New Articles
- Optimizing 16-Bit Unsigned Multipliers with Reversible Logic Gates for an Enhanced Performance
- How NoC architecture solves MCU design challenges
- Automating Hardware-Software Consistency in Complex SoCs
- Beyond Limits: Unleashing the 10.7 Gbps LPDDR5X Subsystem
- How to Design Secure SoCs: Essential Security Features for Digital Designers
Most Popular
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |