Joshua Beaudet, Analog Devices
EDN (February 26, 2015)
Today's methods for BER (bit-error-rate) testing of high-speed serial links such as PCIe and SATA rely on predetermined patterns that don't represent real-world situations. These patterns use a defined amount of jitter sent through a precise channel from a DUT's transmitter to its receiver; the DUT runs in a loopback state. Obtaining a valid BER measurement requires at least a trillion bits. The BER measurement is difficult to perform because of the test equipment needed and the setup to properly run the test.
A different method, developed at the UNH-IOL, uses real-world data. While more work needs to be done, the test method proposed here shows promise for using real-world data for testing digital communications systems such as PCIe and SATA. The advantage of the UNH-IOL-developed method is that it uses readily available equipment without the need for a pattern generator or BERT (bit-error-rate tester). It also eliminates the need for loopback testing and manually aligning clock domains.
Transceivers have different types of loopbacks that can affect clock recovery between the measurement device and DUT, producing mixed results. Unless the clocks are correctly synchronized, false errors can occur. Furthermore, test patterns don't represent realistic traffic. These issues compound to make an untrustworthy test.
The UNH-IOL set out to develop a test procedure that lets two PCIe and SATA devices send traffic to each other—thus removing loopback—while still injecting jitter into the system. Experiments show that the proposed method proposed can yield the same BER estimates to existing methods, but with real-world traffic and a less expensive test setup.
To verify the validity of the proposed test method, engineers at UNH-IOL calibrated each test setup to the specific signal settings. The existing methods give a straight BER measurement. The proposed method will deduce a BER from the CRC (cyclic-redundancy check) errors counted. Using the proposed test, we sent more than trillion bits of traffic between two devices. A jitter generator adds a controlled amount of jitter. The test channel used in this method has the same effects as those used in the traditional BERT-based methods.
Click here to read more ...