Post-Quantum Cryptography - nQrux® Secure Boot - Quantum-Secure Authenticated Boot (PQC)
When System Designers Must Care About Silicon IP
Ron Wilson, Altera
January 6, 2016
As systems-on-chips move into next-big-thing markets like autonomous vehicles or the Internet of Things (IoT), SoC designers are facing new kinds of requirements—environmental, life-cycle, reliability, and security, for example—completely foreign to their experience in consumer or communications applications. These requirements, in turn, are changing the way SoC developers must evaluate and integrate intellectual property (IP). And more than ever, developers’ IP decisions are directly affecting the success of their customers, the system developers—through issues that might never appear on an SoC data sheet. Papers at this month’s Design & Reuse IP/SoC Conference shone a spotlight on some of these hidden issues.
E-mail This Article | Printer-Friendly Page |
|
Intel FPGA Hot IP
Related Articles
- When Developing New Silicon IP, Is First Pass Success Possible?
- DRAM Controllers for System Designers
- Viewpoint: EDA vendors must focus on making silicon profitable for their customers
- How designers can survive the embedded multiprocessor revolution
- In-System Silicon Validation and Debug -- Part 3: Silicon Experience
New Articles
- Early Interactive Short Isolation for Faster SoC Verification
- The Ideal Crypto Coprocessor with Root of Trust to Support Customer Complete Full Chip Evaluation: PUFcc gained SESIP and PSA Certified™ Level 3 RoT Component Certification
- Advanced Packaging and Chiplets Can Be for Everyone
- Timing Optimization Technique Using Useful Skew in 5nm Technology Node
- Streamlining SoC Design with IDS-Integrate™
Most Popular
- System Verilog Macro: A Powerful Feature for Design Verification Projects
- System Verilog Assertions Simplified
- Enhancing VLSI Design Efficiency: Tackling Congestion and Shorts with Practical Approaches and PnR Tool (ICC2)
- UPF Constraint coding for SoC - A Case Study
- UVM RAL Model: Usage and Application