Anubhav Shukla & Syed Shakir Iqbal, LG Soft India Pvt. Ltd.
With performance, functionality and operating battery life becoming key USP in mobile and handheld consumer electronics coupled designers are required to use a wide range of techniques for improvements in performance, area and power. Design cycle tapering and reduction in turnaround time (TAT) with optimum QoR needs identification and removal of any unnecessary pessimism in design. Advancements in technology involving SOCV/AOCV libraries and improved yield correlation for functional silicon have contributed significantly towards the momentum of PBA signoff in hierarchical design. Nevertheless, the tools and technology still being in development phase are not mature to capitalize benefits of PBA within the implementation environment. The key factors enveloping these limitations are design complexities, runtime issues involving physical, power and PBA data handling and mismatch across signoff and implementation with respect to PBA. This white paper is targeted to briefly discuss a few methodologies that can be used within the existing GBA implementation setup to extract the benefits of PBA without compromising signoff.
Slack Grouping Based Optimization
Signoff tools used in STA like tempus provide us with the opportunity to perform PBA analysis and compare timing paths and slacks across GBA and PBA within the same environment. In our proposed methodology, using the signoff tool to extract the GBA vs. PBA margins across specific slack ranges (groups), estimation of a slack margin can be used to leverage PBA benefits under each group based upon the criticality of the paths. For example, path groups with GBA slack within 1000ps to 100ps will have an average gain of say 40ps in PBA setup analysis, while path groups with slack range 0ps to -150ps may have a higher gain (say 50ps). The uncertainty/margin is thus lowered for each slack group based on these PBA margins. We only used 70% of the actual margin used in the given example while 30% was retained in order to model tool mismatch. Additionally, we also used these path/uncertainty adjustments primarily on reg2reg, reg2macro and macro2reg as in case of I/O timing PBA timing is not accurate for I/Os at block level (users may choose to modify these values depending upon the nature of tools used and the learnings through their own design experiences) in the GBA implementation tool environment. Thus, most of the PBA benefits are leveraged inside implementation. This helps in apposite optimization based on slack and criticality of each path making the approach more dynamic and convergent. Additionally, since PBA slack recovery optimization is done in implementation instead of a timing ECO generation tool, QoR also improves along with faster TAT with reduced optimization iterations
TABLE I: QoR Improvement Using Adjusted Path Uncertainty in Implementation (Post Route with Noise)
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Figure 1: Adjusting Path Uncertainty to emulate PBA in EDI/Innovus GBA implementation environment.
Threshold Sweep for Leakage Recovery
In previous methodology, we discussed a strategy to leverage the PBA margin to prevent over optimization of paths to obtain a better QoR within a GBA implementation/PNR tool like Innovus/EDI. Using a similar PBA v/s GBA slack approach we can also enhance the penetration of leakage optimization in paths violating GBA but ample PBA slack. Moreover, this scheme also enables us to determine a sweet spot for leakage recovery without compromising signoff and helps in determining the limits of leakage recovery through ECO optimization tools like tempus TSO.
Generally, leakage recovery is done with a zero or some positive slack target in order to reduce its impact on timing critical paths especially if the optimization is being done post-route and with noise analysis. On the other hand, as signoff is PBA driven, there is a high probability that the very reason for this conservative approach may not be applicable to all the paths lying near zero slack. The critical paths will mostly benefit through PBA and hence even if BA is violating, PBA may still hold enough slack to validate them. In addition, the as the count for non-critical paths almost always dominates the design hence, a conservative approach will also hamper the QoR enhancement through optimization of majority paths. In order to utilize PBA margin along with the fact about the dominant nature of non-critical paths, we propose a threshold sweep based method for leakage recovery. The proposed approach begins leakage optimization in the PBA environment (tempus TSO) on paths with a certain slack target say +50ps and continues to reduce this slack target by a low threshold (say 10ps) until slack degradation (enough to be critical) is observed within the PBA environment of tempus ECO generation. This recovery allows the estimation of critical slack point prior which degradation won’t be observed and also helps in assessing the limits of signoff ECO tool to recover the caused degradation. Additionally, since Tempus ECO or TSO tool is very much limited in terms of leakage/setup optimization and hence we use the slack margin estimations from the tempus environment and thus relax the constraints appropriately inside the GBA cockpit of innovus/edi. We were able to recover ~2% (through tempus generated ECOs) and an additional ~3.8% (through innovus generated ECOs) leakage using the proposed approach respectively. This enables us to enhance the leakage slack threshold window with a faster granular leakage recovery along with determination of slack threshold ranges which are to be avoided as efficient recovery of setup/hold may not be possible post those points. The significance of this critical point is that it helps in avoiding setup as well as hold degradation with noise which the tools have difficulty to correlate with during optimization.
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Figure 2: Leakage Recovery using PBA margin sweep in GBA environment of EDI/Innovus.
Common Clock Path Branch Point Enhancement
Common clock path branch point plays a very important role not only in hold path criticality across corners but also the QoR impact in terms minimum hold buffer insertion. The controllability of the branch point is maintained through the use of CPPR (common path pessimism removal) threshold. CPPR threshold leaves a minimum pessimism inside the common clock path for signoff making it more robust. However, unlike a fixed value of uncertainty the CPPR threshold and CPPR branch point selection is modelled depending upon the common clock latency and late-early skew. If the latency of a common clock path is higher, then for the same threshold the CPPR point may come earlier i.e. shift towards source. Similarly when the latency is reduced the CPPR point shifts towards the sink thus reducing the uncommon skew due to CPPR threshold. Clock latencies are reduced in PBA as compared to GBA specifically in case of scan shift paths where almost the entire clock path is common. Thus the overall PBA CPPR adjustment increases, reducing clock skew.
Figure 3: Reducing hold Buffer Insertion by lowering CPPR threshold in GBA optimization.
This additional margin can range from 2ps to 15ps (or more) in case scan shift and functional modes with common clocks network and large group parallel paths (data subject to technology and type of design collaterals). To reduce scan shift hold buffer insertion we can leverage this margin by modeling it within GBA using the following two approaches:
The margins are evaluated from the scan shift mode of tempus and there was a significant reduction in the overall scan shift buffer insertion without degrading the hold timing as shown in the table below. There is a minor degradation in hold timing as CPPR threshold for signoff is still 20ps and it is reduced only in EDI environment not tempus for optimization.
TABLE II: Hold Buffer Reduction in Scan Shift Using CPPR Adjustment (Post Route with Noise)
The approaches we have discussed here have demonstrated potential to be useful in cases where PBA support is not possible in the PNR or other optimization stages. The proposed methods target not only QoR improvements in terms of power and area but also offer timing benefits for optimal optimization efforts by the tool on paths without compromise in signoff.
While these methods are promising and offer a more apposite optimization that can be generically be extended to other PNR/STA tool platforms, it should be noted that all these benefits are subject to the tool margins and pessimism that are being used in the design.
The following are the references for the tool platforms that were used during the implementation of proposed methodologies.
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