Jean-Marie Brunet, Mentor, a Siemens Business
EETimes (9/26/2017 04:41 PM EDT)
To handle the complexity of hardware and software for advanced SoCs, design teams are employing hardware emulation for full chip functional verification of the controller SoC design as well as for the SoC's firmware.
To satisfy the world’s insatiable demand for data anytime and anywhere, storage devices are rapidly evolving and competition in the HDD and SSD storage arenas is getting fierce. At the heart of SSDs are complex controller SoCs that manage and monitor the integrity of incoming and outgoing data. These controllers also allocate data to a field/array of NAND devices, while monitoring the wear of the NAND to prolong the life of each storage unit. Each controller requires an algorithm and firmware to manage the complexities of writing and reading the various types of flash. That means controller designs not only have increasing hardware complexity, but software as well, and must communicate to a broad number of devices and protocols.
To handle the complexity of hardware and software for these SoCs, design teams are employing hardware emulation for full chip functional verification of the controller SoC design as well as for the SoC’s firmware. When choosing an emulator, teams invariably look at the available options of an in-circuit emulation (ICE) or virtual emulation methodology.
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