There are some IPs in SOC which are of general use and malfunction on them impacts a entire SOC. We Identified these IPs and analyze impact on SOC due to their malfunction–
Clock and Reset Generator.
A malfunction on these IPs disturb entire SOC in a way that Software cannot handle it and would not be aware that there is malfunction impacting.
1. Clock and Reset generator
If there are malfunction within Clock and Reset Generator and there is some issue in RESET GENERATION –
And if reset are generated in wrong times then -
This can make Some other IPs into Reset.
Or reset their configuration in the runtime.
Making them fail into their working.
And if Reset is triggered but the reset duration is not right –
Can make reset recovery issues.
Would keep glitchy dirty configurations within registers making it dependent on DRIVER to clean up all the configuration not just the required bits to be updated.
And if reset is triggered to Half the SOC but remaining half is still not reset -
Can make the entire working of SOC totally unknown and unpredictable.
And if there are issues in CLOCK GENERATION and somehow clock configuration is disturbed then –
Clock driven to different circuits is not Right. And if clocks generated are HIGH will make IP working at right frequency than expected.
This may make Timing issues.
Clock Domain Crossing issues.
This will make SOC to Fail for specific application.
In an extreme case, some portion of Chip will be more than expected HOT and age Faster making that application to FAIL permanently over time.
Usage of times is quiet important in a system. Timers can be configured to generate different interrupts at different times. System needs it for different applications like –
Passing Controls from Application to Operating System.
On Assert of Interrupt, the Processor will switch to exception mode and RUN the ISR(Interrupt Service Routine) and that will run a small application which will pass back controls back to Operating System.
Some system use timers for timekeeping.
Using timestamp as input to use as stamp while encrypting packets.
Real time Timers are used for Signature validation and Packet sequencing.
There can be so many use Interrupt has in a system. But if this such a important IP gets corrupted by any means and start generating interrupts at wrong times or start generating wrong timestamp values. The entire system will start misbehave.
If the Interrupts are generated Early due to corruption in start value following can be impacts –
The Application will not be able to finish task it need to do and the controls are back to OS.
This will make System to fail certain activity as Application will not be able to finish required task.
If the Interrupts are generated late due to corruption in start values following can be impacts –
System will start operating slower than expected. The application will finish the task and System will be keep waiting for timers to fire a interrupt to OS to pass on controls.
If in between watchdog timeouts, it will trigger a system wide Reset and system will reboot.
And if Interrupts are NOT generated due to corruption in Mask values following can be impacts –
The System will Hang.
Watchdog will timeout, will trigger a system wide Reset and system will reboot.
Now one thing is sure one cannot make a high reliable product from such an Unreliable Current Electronics.
A watchdog is a very important IP Component of SOC and System use it as a Timeout Counter to ensure if any Application or OS hangs, an interrupt trigger from it will ensure a reset on that IP block or System.
System keep also a watchdog timeout to ensure hardware components like Backbone, Processor and other reliable components are running fine. And if they lock or Misbehave in any scenarios, watchdog will fire interrupt to take out system to reboot.
Any Corruption in watchdog will make –
Early Trigger –
System will unnecessary restart even if there is no issue.
Late Trigger –
System will remain Hang as long as watchdog fires interrupt.
No Trigger –
System will remain in hang duration.
The Unreliability in this component makes entire application or System into unreliable state as no one can ensure that a certain reliable service is definitely going to work in all possible conditions.
4. Interrupt Controller
A interrupt Controller is also a key element in the entire working of SOC and application. A interrupt controller is used to gather different Interrupts from different IPs within a SOC and pass it to Processor to switch to Exception mode and run certain mapper ISR for that Interrupt.
Any Corruption in this IP will make –
Not to pass a interrupt to SOC.
If mask get corrupted, certain interrupt will never pass.
Or False interrupt to SOC.
Or lock a certain bit to keep asserted and make it continuously pass it to SOC.
In all the cases above, the Processor working would be distracted. The Wires connected to this IP are coming from all the places from the SOC and are long in nature making it more easily distracted by electromagnetic noise.
So, we see by evaluating these Four IPs are very important for a SOC to ensure the services are running fine. Whatever we do in Software, if any of these four IPs misbehave, the entire system fails and unable to provide reliable services to the User.
We at GreenIPCore Built these IPs with A VERY STABLE AND HIGH RELIABLE electronics. It will allow -
. Will REMOVE lots of UNSTABILITY issues and removes MALFUNCTION of SOC in different environmental condition.
Will Improve Product Usage in different High reliable application and allow users to use the SOC to build more reliable product.
This will allow Complex application to run with high reliability will make product developer to make complex high reliable application.
The overall gain to build a SOC which does not fail is way beyond more and increase Silicon Chips consumption is General Electronics.
We can go over the overall gain created by this IP in overall lifetime of SOC in terms of decreasing cost to ensure product Guarantee, Warrantee, In Field Replacement and Repairs is much more.
This will improve Product valuation and increase chip usage in different existing fields.
Allow user to experiment and make new products in MORE RELIABLE APPLICATION areas.
This will make the SOC run High stable in real time Application. Improve the Product Value over time.
GreenIPCore, Re-constructed these four IPs with new High Reliable Technology and Constructed them for very high reliable working.
Clock and Reset Generator.
One can see the issues in this youtube videos -
Effect on of Noise on Calculators (just to give you a view of Noise effect) -
Developed New type Counter which is more Stable
Developed New Shift registers Testing Demo
Following is Sample video showing working of Full High Reliable Timers and is compared against Standard timers -
We offer license for these IPs under SOC Stability Package. These four IPs are Fully tested and are available Soft Silicon Verilog Codes available with wide verity of configuration.