90nm OTP Non Volatile Memory for Standard CMOS Logic Process
Which DDR SDRAM Memory to Use and When
By Vadhiraj Sankaranarayanan, Synopsys
Overview
Memory performance is a critical component for achieving the desired system performance in a wide range of applications from cloud computing and artificial intelligence (AI) to automotive and mobile. Dual Data Rate Synchronous Dynamic Random-access Memory (DDR SDRAM) or simply DRAM has emerged as the de facto memory technology for the main memory due to its many advantages: high density with simplistic architecture using a capacitor as a storage element, low latency and high performance, almost infinite access endurance, and low power. The Joint Electron Device Engineering Council (JEDEC) has defined several DRAM categories of standards to meet the power, performance, and area requirements of each application. Selecting the right memory solution is often the most critical decision for obtaining the optimal system performance. This whitepaper provides an overview of the JEDEC memory standards to help SoC designers select the right memory solution, including IP, that best fits their application requirements.
If you wish to download a copy of this white paper, click here
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