Regardless of the level of technology their organizations are currently using, engineers share very similar needs in solving complex product design challenges. The pressures to design "smarter" products that are feature rich, able to communicate, perform faster, and are smaller and more efficient continue to operate at all levels of the marketplace. This means that design teams must not only cope with increasingly complex hardware platforms, but must also learn to integrate hardware design flows with the software development that increasingly defines the end product.
Against this background, migrating these system-like designs to silicon seems like the obvious response. Indeed, the current range of investments in systems-on-chip reflects the urgency with which companies view this challenge. However, moving designs to silicon introduces a whole new range of problems.
Scaling the barriers
Emerging chip geometries are defining heighten ed (rather than lowered) economic and technical barriers to implementation in silicon. At the 0.13 micron/300mm wafer level, these barriers eliminate perhaps up to 80 percent of current designs from ASIC consideration. As many in the industry have already observed, the required capital and engineering investment to move these designs to silicon simply cannot be amortized across their available markets.
The biggest companies will do as they have done in the past -- employ the most exotic design and verification tools to surmount these challenges. But, what about companies that service more specialized markets? Without the scale of a consumer marketplace to underwrite the development costs for next generation products, will the electronics design industry evolve into a system of technological "haves" and "have-nots"?
Will technology sector market entry barriers become so high that innovation will be stifled, as competitive technology falls only within the reach of the dominant players? The last time an yone looked, the world was still cranking out incredible numbers of EE's. What are these engineers going to be designing? What tools will they be using?
An alternative SoC platform
There is a significant alternative to ASIC design in the rapidly evolving programmable devices market. Each new generation of FPGAs provides an increasingly compelling alternative to ASICs as system-capable design platforms. Although FPGAs cannot compete on a price, performance or power efficiency level with ASICs, they provide a reconfigurable platform without the higher economic and technical barriers associated with dedicated silicon. Naturally, this fact is not lost on the major FPGA vendors who are energetically pushing the technology as a "platform based" design solution.
Of course, the "state of the art" FPGAs that are most capable to competing head-on with ASICs are the most expensive of this class of chip to buy. They also generate the greatest margins for the FPGA vendors. While these expensive chips may be a valid platform for prototyping an ASIC, they cannot, given their high cost per unit, provide a hardware platform for any but the most high-value products.
Fortunately, away from the cutting edge FPGA position, an emerging "commodity" market for lower-cost FPGAs is forming. These devices can provide a means for existing board-level design products to evolve in a way that makes economic sense for a more mainstream market. However, in order to provide a seamless alternate path to mainstream product-level system design, the supporting environment of hardware, software, intellectual property and development tools must first be meaningfully integrated. And, once integrated, these technologies will have to be packaged and delivered in a manner that makes them applicable to a wider range of applications.
Divergent EDA paths
In simple terms, the traditional "board level" design automation world seems to be on a divergent path from its bigger "chip level" sister. While these two streams sh are common parentage and evolution, they are now being driven by two inherently incompatible business models.
At the highest level, specialized design technology becomes a strategic partner to product development. Huge investments in tool development and services are justified by the technical and economic risks implicit in chip design. The economic value of consumer (and other high-value) markets provides the fuel for this evolution.
How different is the relatively mundane world that operates "outside" the chip? Here the design goals and issues may parallel chip-level technology, but realization of the design is subject to a host of constraints that reflect the economic and technical containers that exist for these projects. Many of the smaller, more specialized, and innovative companies will not qualify for anything but "associate" membership in the elite community of cutting Electronic Design Automation developers and their handful of multinational accounts. These smaller companies have been lar gely left to solve next-generation design problems for themselves. But, this is not because they can't buy technology from the EDA powerhouses.
As the design tools industry has consolidated through the late 1990s, many of the small, specialized tool companies were acquired by the majors: Cadence, Synopsys and Mentor Graphics. These companies have been quite open regarding their objectives -- and they have been pretty successful on two fronts. First, they've been able to acquire market share to fuel growth, and secondly they've cherry-picked the technological prizes that the acquisition targets had developed.
The problem lies in the fate of those customers who were traditionally served by the smaller design tool houses. Inside the larger organization, their collective value simply cannot compete with the major key accounts. How likely then is it that these big EDA companies will be interested in the needs of such "marginal" customers? The products that are most relevant to these customers are increas ingly commodity items in the market that can only provide "entry-level" value, and returns, to their owners. Predictably, there is little tool development evident at this end of the price range and these products have become technologically stagnant.
Because so much of the EDA giants' value is tied up on so few customers, there's no real motivation to develop or deliver new technology to this lower dollar-value customer segment where it would simply undermine the premium position that the same technology would deliver if restricted to a few high-end customers. So this is the fundamental problem of a maturing design tools market -- that the needs of mainstream customers cannot fit meaningfully into the business model that drives the major tool developers. Also, the viability of these companies is compromised by restricted access to technologies monopolized by a small number of providers.
EDA for mass consumption
Fortunately, this conflict does create a significant opportunity for those surv iving, independent tool developers whose scaleable business models are a better fit with these mainstream customers. The problem is that there needs to be a technology base that is adequate to meet the more demanding next-generation design requirements of these customers, and at the same time, a business model capable of delivering this technology at an accessible price.
These two variables tend to suffer from a certain degree of exclusivity, and it has been the historic inability of the smaller players to operate profitably that has fueled such dramatic, near total consolidation of the EDA industry. Where independent EDA developers continue to find viable niches in which to operate, they will have to perform with utmost efficiency in order to be able to deliver comparable design technology at dramatically lower price points. How will this be possible?
It could be argued that two factors will enable this alternate pathway to mainstream electronic product design. First, the dominant EDA companies will increasingly recognize the need to actively shed those lower-value customers that cannot contribute to their needed growth. By providing a much larger and more distributed constituency for the independent developers, these customers will generate the sales volumes needed to amortize the development and delivery of those tools most appropriate to their needs.
The second factor concerns the nature of technology itself -- and the fact that all new technologies, including state-of-the-art EDA technology, evolves from "cutting edge" to commodity over time. By building this inevitable process into the business model, independent developers can speed the distribution of new technology across broader markets in an efficient and profitable manner.
There are already visible and compelling models emerging that support this scenario. The first layers of a design platform that will allow broad market-supported, systems-level design are moving within reach. As each new generation of high-capacity FPGA is launche d, their parent generation falls toward commodity price points. It's particularly exciting to see market leaders Altera and Xilinx competing in the value arena with their respective Cyclone and Spartan product families.
Re-energizing the engines of growth
Many of the key design technologies at the hardware and software level are ready to support migration to this new class of hardware platform. It is conceivable that soon these designs will be able to fully exploit the quick turnaround that is provided by reconfigurable hardware, low-cost embedded software tools and accessible, "cash and carry" IP. The bottom line is that there's plenty of good, proven, reliable technology that has yet to reach these markets. For companies with sufficient vision to capture and deliver these benefits to waiting markets, the opportunities beckon.
Before any new technology can generate its full value, it must first be made available and packaged for the greatest number of potential applications. Pushing the boundaries of design technology adoption will allow an ever broader range of products to evolve quickly and competitively. For those of us who believe in the power of technology, broadening its accessibility at all levels is the key to unlocking productivity improvement, and who knows? It might even help to re-energize the engines of economic growth.
Nick Martin is the founder and current joint CEO of Sydney, Australia-based Altium Limited (formerly Protel International), a developer and supplier of Windows-based EDA and embedded software development tools.