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SoC slam dunk still slightly out of reach
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SoC slam dunk still slightly out of reach
By Ron Wilson, EE Times
February 12, 2003 (8:43 p.m. EST)
URL: http://www.eetimes.com/story/OEG20030212S0027
SAN FRANCISCO — A group of design experts set themselves the task of determining if a system-on-chip IC can include all of the electronics that make up a high-volume device such as a cell phone handset in the provocatively titled panel session, "SoC: DOA or RIP?" held Tuesday (Feb. 11) at the International Solid-State Circuits Conference. Their answers ranged from a detailed definition of the problem to an attack on alternatives to a resounding maybe.
Ken Hansen, a vice president at Motorola Inc. (Austin, Texas), described the handset problem. "Today the most integrated GSM handset includes five major ICs, memory and a lot of passive components," Hansen said. He pointed out that in principle this could be reduced to a single chip. "There are single-chip Bluetooth radios, for example," he said. But he speculated that a single-chip GSM handset would require three or four years, a 300-person design team and would be sadly uncompetitive.
In contrast, Chris Mangelsdorf, design center director at Analog Devices Inc. (Tokyo), warned against timidity. "Integration always wins," he stated. If a company set out to implement a multichip module solution, a competitor that pursued a single-chip solution would succeed and win, he said.
Robert Mertens, senior vice president at IMEC (Leuven, Belgium), a research consortium, offered the contrasting view that differences in process and environment would keep different functions — power, RF and digital baseband, for instance — on different substrates. But that would lead to the rapid development of very dense stacked packaging that would make combinations of dice nearly monolithic. Mertens cited interconnect, testing and thermal/mechanical issues as problems to be solved.
Texas Instruments Inc. vice president Dennis Buss, Intel Corp. technology development director Greg Atwood, and Stanford University department chairman Bruce Wooley concluded the discussion by pretty much ag reeing with each other that technical and practical issues would nearly always place the optimum design — by nearly any combination of criteria — somewhere on the continuum between a handful of small chips and a single large multitechnology SoC. All three were certain about continued advances in integration, but all three pointed the accusing finger at analog and power circuits as long-term holdouts.
