A few years ago, just talking about injecting a new language into hardware design -- namely C -- raised technical and emotional issues. Hardware engineers accustomed to using HDLs shuddered to think that a software development and modeling language like C/C++ could be used for hardware design. Then, SystemC came along as a proposed standard for developing complex electronic systems.
Hardware verification is being targeted now with test languages, some of which are well needed. This verification infrastructure, however, is patched together on a weak, inadequate HDL foundation. The large amounts of software that need to coexist (and be coverified) with the hardware impose its own limitations on the HDL-based flow. Verilog, in all its variations, and VHDL are no longer viable solutions for complex electronic system level design and verification. The time has come for a new electronic system level (ESL) methodology, and SystemC is central to its em ergence and adoption.
Verilog and VHDL have been successful standards because designers decided to use them, and EDA vendors developed tools, environments, and methodologies to support them. SystemC and C/C++ deliver two main benefits to ESL methodology: the appropriate language abstraction to handle architectural issues and the linkage to software to address system partitioning and integration. However, what's missing today are the tools and environment that enable SystemC to be used without sacrificing the link to existing HDL environments and flows for implementation.
In order for ESL methodology to succeed in raising system design productivity to the next level, the design and EDA communities first need to overcome their fear of change. While EDA vendors are apparently supporting SystemC, they must also protect their existing HDL tool installed base, as this is a huge source of revenue. Similarly, designers want to protect their legacy design flows and investment in HDLs. Next, both hardware and software designers must embrace SystemC as the unifying bridge between the two worlds.
What's needed is an environment that both the hardware and software designers can use to execute and simulate SystemC designs with entry and debugging tools that are familiar to their respective domains. For HDL-based designers, the environment must provide an evolutionary path up from pure HDL designs to a mixture of HDL and SystemC. For software designers, the environment must give them the flexibility to interface with the hardware design at multiple levels to ensure early integration and a continuous verification flow throughout the ESL process.
Many companies already are in touch with different aspects of ESL. They may use 'C/C++' for behavioral modeling, write high-level test benches, or try to link hardware and software with all kinds of methods. Although they do not really think ESL, they "feel" it, in the form of the large gap between the design flow they currently use and the one they will need in the near future.
As design complexities continue to grow and time-to-market gets ever shorter for electronic systems, more hardware and software designers will make the move to ESL and SystemC. In adopting ESL, they will demand a robust infrastructure that enables them to work more efficiently and effectively.
Rami Rachamim is director of marketing, Summit Design, Inc.