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IC design: A short primer on the formal methods-based verification
by Ashish Darbari, Axiomise
It’s no secret that hardware is the new currency in the chip world. It’s no longer the case that the semiconductor industry is in the hands of traditional semiconductor giants; an increasing number of software companies now have their own dedicated hardware development teams. With the advent of open-source architectures, developing silicon with open-source framework and tools is slowly becoming mainstream.
However, while designing has become easier, verification has not.
The 2020 Wilson Research Group study on functional verification points out that 83% of the FPGA and 68% of the ASIC designs fail in the first attempt. Also worth noting is that 68% of the ASIC projects run behind schedule.
The survey reports that for processor development, the ratio of verification to design engineers is 5:1. Imagine having to hire five times more verification resources than design and having to respin the chip.
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