by Phil Rose, Cadence Design Foundry UK Ltd
Design reuse has transformed business models within the semiconductor industry. Combining a selection of reuse cores and new designs significantly shortens the time required to create complex systems on chip and reduces costs. However, whether IP should be developed internally or sourced externally is a particular challenge for companies wishing to maximize return on investment.
A key barrier to providing IP may be the lack of the necessary infrastructure to support IP development and maintenance. To overcome this, semiconductor companies will partner with IP Reuse Experts. These experts will provide a range of proven services including technology leadership, design, contract management, global sales and marketing combined with multiple routes to market. The partnership will provide opportunities for the partners to develop new IP in chosen technology areas, giving customers a much broader choice of proven IP blocks from one supplier.
IP Reuse Partnership
In recent years there has been a significant increase in the use of outsourcing and IP within the electronics industry. The increased awareness and use of third party IP has become standard business practice for many semiconductor companies and this has led to the recognition of the value of internally developed IP – and the importance of IP Reuse strategies in order to make best use of this significant asset.
There is a challenge that companies must meet when wanting to reuse IP. There will be cost savings when IP is reused, and revenue when that IP is sold externally. However, there is an investment required to develop an effective IP Reuse infrastructure. The benefit must outweigh the cost. Companies have limited resources and must focus them on their core competences to maximize the added value of those resources. Execution of an IP Reuse program may not be such a core competence and this leads to recognition of the need to outsource IP Reuse operations.
Developing IP Reuse infrastructure with partners who combine world leading IP and outsourcing capabilities will enable semiconductor companies to reduce cost and generate revenue in a strategic and efficient manner.
An IP Reuse partner will show strength in product marketing and development, with active participation in the evolution of ongoing and new protocol standards. Combining a history of technology leadership with a wide portfolio of IP demonstrates an IP Reuse partner's technical competency and bandwidth to fully engage with their customers and support their specific requirements. This also confirms the partner's ability to understand core markets as well as to be aware of and react to market trends.
Route to Market
An IP Reuse partner can provide a wide range of routes to market. Cadence Design Foundry provides a mixture of direct and indirect routes:
1. A direct IP sales channel;
2. Indirectly supplying IP to Design Services customers;
3. Indirectly through our EDA colleagues.
Also a highly visible web presence, including, of course, the Design and Reuse SIP Exchange, is critical to ensuring the success of an IP sales channel.
Flexible Business Model
An ideal IP Reuse partner should provide a flexible business model. Engagements will range from simply providing a shop window for the customer's IP to a joint development of a strategic IP roadmap with funding and revenue shared by the partners. Like any successful partnership, it can only work when a generic, but sound framework has been established. This will allow the partners to understand their roles and implement the IP Reuse strategy. It will also allow the partners to respond quickly to future scenarios.
The flexibility of such a framework brings will allow different scenarios to be evaluated and responded to efficiently. Proper analysis of strategic aspects of partnership will enable the parties to respond to ongoing issues and opportunities to their mutual benefit.
A significant example of this is the process that is required to allow the technical and business merits of a specific proposal to be analyzed and agreed by the management of both companies. A specific engagement can only meet the business objectives of both companies if this analysis is performed within the context of each company's strategic decision making processes. However, to gain the necessary benefit, the agreement must be reached quickly and consistently. A clearly defined business development process must be put in place to allow this evaluation of developments based on an analysis of the market, return on investment, technical issues and an analysis of risk amongst other criteria.
The joint objective is to develop a portfolio of "best in breed" IP that benefits both companies by a reduction in overall development costs and an attractive ROI.
IP Reuse impacts working practice at many levels and demands changes in culture and approach. There may be an attitude of "we always do it this way" or "not invented here", which can result in a nominal adherence to IP Reuse practices, or even outright hostility and refusal. This is especially true if this is seen to be an imposed program. Although the partnership must be agreed at a corporate level, the input of key staff is crucial to the success of the program and they must be brought into the process. It is important that there is synergy between the engineering staff of the two partners.
With the right partner, companies will be able to efficiently and successfully implement an IP Re-use infrastructure and stimulate a culture of IP Reuse. This will lead to the development of IP that will be highly useable on multiple internal projects as well as readily suitable for external sales.
Enhanced external sales will start to generate revenue. Initially, this will be set off against the cost of the IP Reuse implementation, and then become a significant revenue stream in its own right.
Legal contract management is a fundamental part of the IP Reuse business process both during pre-sales negotiation and ongoing during project execution. IP suppliers, particularly those who are also design services providers, have considerable experience in contract development and improvement through repeated customer engagements.
IP Reuse partners should be able to either input to the Customer's contract management or provide their own as the proposed standard.
Effective integration support and maintenance is critical to ensuring that customers not only remain as customers but also develop into strategic accounts. Integration support is aimed at ensuring a positive customer experience – it is a commitment to enable the customer to integrate the IP into their design as quickly as possible. Providing quality support and maintenance requires a global infrastructure, and benefits greatly from an understanding of the customer's business.
Successful Design Reuse - The background
The best way to describe the critical issues of any process is through example – and the experiences of Cadence Design Foundry in establishing itself as a leading supplier of IP highlights many of the points described here.
The company offers an IP Reuse strategy based on its expertise as both an IP supplier and an IP user. Over the course of several years, it has developed an SoC Design Center at Livingston, Scotland, having successfully integrated a large number of designs on behalf of its customers. During that time CDF has delivered designs in a wide range of application spaces.
The SoC Design Center was developed from scratch, recruiting experienced engineers from around the world. These engineers have been able IP Based SoC Design 2002 - October 30-31, 2002 3 to pool the best practices learnt in systems houses, design service providers and semiconductor manufacturers to establish a world-class development methodology and tool-flow.
This pooled expertise is relevant both to one-off designs and to designs that can be re-used. In addition, the customer focus that Cadence Design Foundry requires to execute projects successfully can be brought to bear on the support and maintenance of products.
Due to the level of IP reuse at the Livingston Design Center while integrating large complex SoC designs, the engineers there have learnt many lessons. It goes without saying, nowadays, that a large SoC design cannot be designed from scratch with thousands upon thousands of lines of newly coded RTL. Indeed, the whole IP market-place has mushroomed in recent years in response to the need to re-use basic building blocks.
These building blocks are acquired through several means. For instance,
1. The customer already has a component they wish to re-use in this particular design.
2. The customer has identified a component from an IP supplier. Or,
3. The customer commissions Cadence Design Foundry to design the component from scratch.
The team will then integrate this hotchpotch of components into a coherent SoC design.
The Livingston team has seen the reality of IP out there in the market place. The components acquired are, let us say, of varying quality. "The Good, the Bad and the Ugly." They have seen components that are very simple to integrate into a system design. Conversely, they have seen components where the effort required to integrate them could have been deployed more efficiently to design them from scratch.
Based on its wide experience integrating IP modules, the team has been able to define a wish list of criteria for IP to be fit for purpose – an IP Acceptance checklist. This is different from the traditional IP quality measures. Traditionally, reuse measures as promoted by the Reuse Methodology Manual and OpenMORE have concentrated on the development of a design style and methodology for predominantly internal reuse.
When integrating SoC designs, it became obvious that there are a number of key application areas where the company had the expertise to develop IP components to address potential customer requirements. The decision to invest some engineering effort in developing IP was taken and the company became involved in the development of IP for Ethernet, Bluetooth and 802.11. In addition, it has a portfolio of AMBA peripherals supporting the ARM-based designs that form the majority of the SoC integration business.
Thus IP development was started from the perspective of the end users of other IP. With this background the quality standards that the team put in place were developed to address usability issues as much as development ones. The Reuse Methodology Manual forms a good starting point for synthesisable, testable designs but it needs a customer's view as well as that of an internal auditor.
Quality of design, implementation and source coding does not, by itself, determine if the development project results in good product. The quality of the development flow contributes a great deal to this. For digital soft IP, the team enhanced our existing specification-to-netlist flow to validate IP not only as a Cadence tool flow, but also tools from vendors such as Mentor Graphic, TransEDA, Synopsys and Verplex.
IP Strategic Planning
Like any organization there is a finite limit to the resource that can be deployed on speculative developments. The company has to prioritize the developments so that those most likely to sell well will get the resource. So simple to say, yet so very complex to do.. In order to make this difficult decision, skills both in understanding the market place and in leading the development of technology are required.
Product Marketing plays a pivotal role in determining what the key technologies, for example in communications, will be in the next few years – the product road-map. In conjunction with the leading company technologists, they participate in various standards organizations for high-speed IO (more than 1 Gb/s), and are developing IP for a number of protocols: SPI-4, SPI-5, Rapid-IO, PCIExpress, etc.
Because of the high data-rates involved with these protocols, implementations must be targeted at 130 nm and smaller technologies. Soft IP validation IP Based SoC Design 2002 - October 30-31, 2002 4 can no longer stop at netlist, it must proceed to fully placed and routed implementations and Cadence Design Foundry has the tools flows to enable fast prototyping in the 130 nm and 90 nm nodes. Existing mixed-signal IP is being reused and modified to develop the SerDes circuits necessary to support these developments.
IP Reuse Infrastructure
All the key contributors are in place for IP Reuse and Development: a user community well experienced in SoC integration; development teams committed to best-practice; a product marketing team providing a strong strategic lead. Coupled with Cadence's commitment to enabling our customers, the Cadence Design Foundry can work with our customers to put in place their IP Reuse and Development Infrastructure.
Example 1 – Product Specification
A semiconductor manufacturer has established an IP Reuse partnership. It wants to develop an IP core for a couple of internal developments, but it is unsure whether there is a viable external market for the core. The services company will put together a technical and business proposal. Its development team will write the requirements specification and from this will devise the project plan and work out the cost and schedule.
The product marketing team will investigate the market, looking at the sort of product which will use the core. The team is likely to do this with input from the manufacturer – after all two views are better than one for analyzing the complex information involved. From this they will estimate the numbers of licenses quarter by quarter and the revenue stream. The costs from the development team and the revenue forecasts from the product marketing team can then contribute to the calculation of Return on Investment. This is very much how any R&D investment process works. In the case of IP Reuse partnership, the two partners now have a common understanding of the business case, and can proceed to engaging in the development of the IP core to the partners' mutual benefit.
Example 2 – Sharing Libraries
A system design house has a specific market-place and set of core IP of its own. As more and more functions are being integrated into SoCs, it realizes that it needs access to IP that is outside its area of technological expertise. It already has a form of IP repository. To avoid having to enter into license discussions for every single piece of additional IP it wants access to, the company can engage an IP Reuse partner and set up an umbrella licensing agreement.
The Reuse partner will then grant the design house access to its IP library. A pricing strategy will be put into place, so that those scoping the project will have this information available. Each use will be individually logged and accounts settled when appropriate.
Example 3 – Productizing IP
A semiconductor manufacturer is interested in stimulating the market for a particular protocol. It realizes that there needs to be a critical mass of suppliers of product using this protocol. It already has designs that implement the protocol. It engages an IP Reuse partner to productize the designs into IP cores. The partner does this by subjecting the design to the same rigorous development methodology as it employs for its own designs. One can imagine a myriad of variations on these examples.
IP Reuse presents opportunities which leading electronics companies cannot afford to ignore. In order to capitalize on these, companies have to make the decision on whether to develop their own IP Reuse Infrastructure or develop this business opportunity using a suitable partner. In choosing a partner it is important that companies understand the range of skills and resources which this partner needs to have in order to fully develop the potential of the opportunity: best class project management, flexible business models and frameworks, routes to market, technology leadership, global sales and support. Many companies have regularly developed world class products but risk implementing second rate IP Reuse programs. With a world class IP Reuse partner they can fully reap the benefits of reusing their technology while remaining focused on dominating the market they know.
Phil Rose has 26 years experience in the design and development of complex digital systems, and has previously worked at ICL. He is now IP Gallery Manager for Cadence Design Foundry with responsibility for IP development methodology and quality.