Tradeoffs Shape Multimode WLAN Silicon Designs
By Lawrence Rigge and Tony Grewe, Agere Systems, CommsDesign.com
April 8, 2003 (9:06 a.m. EST)
The wireless LAN (WLAN) industry is becoming the new alphabet soup of the communication sector. With b, g, and a systems hitting the market and i, e, and f add-ons coming, sorting through the 802.11 sector is a mouthful for engineers. Figure 1: Receiver architecture DC offset properties
While engineers and applications developers discuss the benefits of a, b, and g systems, the WLAN sector is at risk of having interoperability issues. For example if a corporate user has upgraded to an 802.11a network and a user comes in with an 802.11g card, the 802.11g user will be unable to connect.
These potential interoperability issues are being pushed down to the chip level, with OEMs and ODMs calling on vendors to produce a single chipset that can operate in 802.11a, b, and g modes. Designers building these chips, however, face a variety of choices, depending on how one wants to optimize between performance, cost, and time-to-market. Let's examine those choices in more detail starting with the radio archit ecture.
Very-low IF vs. ZIF
Traditionally RF receiver front-ends have been based on heterodyne/superheterodyne architectures, which use one or more intermediate frequency (IF) stages to achieve good selectivity and sensitivity properties. As a result, heterodyne/superheterodyne radios typically require a large number of discrete components, which in turn make high-level integration difficult to achieve. Driving WLAN systems to the cost structures required for mass market applications requires pushing the channel filtering function to lower frequencies through the selective use of direct-conversion also called zero IF (ZIF) and very low IF (VLIF) receiver architectures.
When choosing between a ZIF and VLIF architecture, it is important to carefully examine performance, compatibility with other chips in the system, and integration. In general, a designer must consider whether a ZIF radio architecture is capable of meeting the wireless data system specifications or if a VLIF archi tecture would better handle the performance parameters and product objectives of the application.
A major advantage of ZIF is cost. ZIF architectures have proven to be a good alternative for lowering discrete filtering requirements, decreasing circuit-board areas, reducing component counts and power consumption, and providing a roadmap to ongoing cost reductions over time. ZIF eliminates the need for expensive RF image-rejection filters and IF channel-selection filters while offering the potential for a high degree of integration.
ZIF is a proven architecture for CCK modulation-based 802.11b designs. The complete elimination of an IF stage implies some important performance characteristics that are unique to direct conversion receivers, such as sensitivity and linearity. Since direct conversion translates the radio signal directly to baseband, the majority of the gain and filtering are performed in a frequency band from DC to the signal bandwidth.
There are, however, some issues with the ZIF ar chitecture. Since the local oscillator is so close to the input frequency, the signal can fold around the DC components of the input signal. In the process, intrinsic DC offsets in the signal path can be unintentionally amplified and, in turn, degrade the dynamic range available in the circuit. Additionally, DC offsets can be created if some of the on-channel local oscillator (LO) signal leaks to the RF front-end and is then down-converted (Figure 1).
When employing a ZIF architecture, designers must take measures to ensure that the folded and non-folded frequency components do not overlap in order to prevent signal corruption. Precision analog design techniques can minimize circuit DC offsets, and provide a basis for adjusting most of the remaining offset using calibration methods.
VLIF architectures have many of the desirable properties of ZIF architectures, but without the DC offset problems. This is of particular benefit in OFDM-based systems like 802.11a and g.
In order to increase 802.11 data rates to 54 Mbit/s, 802.11a and g systems employ an OFDM modulation scheme that increases spectral efficiency to allow greater throughput in the channel. The increase in spectral efficiency is accomplished by breaking the high-speed data signal into 64 sub-channels that are transmitted in parallel, enabling a 54-Mbit/s data rate to be squeezed into 20 MHz of channel spectrum.
The high data rate and efficiency enabled by OFDM in turn requires high-level algorithmic processing to be performed at speeds that make ZIF implementations difficult to design. VLIF receivers counter this problem by enabling the filtering of OFDM high-speed sub-channels to be performed at frequencies in the hundreds of kHz range, making it easier to handle the OFDM modulation scheme.
The VLIF architecture can also reduce power in an OFDM des ign. The key to a successful OFDM radio implementation is to create a broadband, 90-deg. shift between the local oscillators, and to match the gain and phase-shifts (frequency independent) in the signal paths. The practical implementation of the digitization process in VLIF for 802.11a/g is generally lower power than for ZIF. While this is contrary to popular opinion, experience suggests the VLIF approach is most efficient for fast signal sub-channels.
So while the ZIF approach has proven to be an effective alternative in the 802.11b space, it may be challenging to implement this architecture in a multi-mode 802.11a/b/g design. In these designs, VLIF is inherently the better option.
Dual- vs. Single-band Transceivers
WLAN products supporting a, b and g versions of 802.11 can use either a single-chip, dual-band radio or two radios, one for the 2.4 GHz bands and one for the 5.2 GHz bands. Depending on the end application, market requirements and time-to-market considerations, various confi gurationsas well as partitions between the chip setsdetermine the most effective structure.
For example, some silicon vendors using separate 2.4 and 5.2 GHz transceivers have been able to get products to market earlier, although the 802.11g standard hasn't been finalized yet, making many of these pre-standard products subject to rapid obsolescence and interoperability problems. Typical in these designs is a single baseband processor with integrated MAC wired to two independent transceivers, one for 2.4 GHz and one for 5.2 GHz. Network monitoring in upper layers of the stack allows applications to locate and associate with any available network.
The alternative approach, putting both radios onto one chip, has many advantages, including cost, small form factor, reduced shielding requirements, fewer adjacent components and lower power consumption (Figure 2). Dual band transceivers can save significant silicon area, enabling multimode systems to be implemented for nearly the same cost as single mode "g only" systems.
Figure 2: Block diagram of a dual-band transceiver.
Since radio ICs typically are accompanied by many discrete components, the single chip radio leads to a bill of materials with significantly lower parts countup to 50% lower by some recent internal studies. Again, network monitoring in upper layers of the stack allows applications to locate and associate with any available network. A client-level network interface card (NIC) supports either one of the two frequencies got throughput optimization, but not both at the same time for cost reasons.
CMOS vs. BiCMOS
While CMOS remains the backbone for digital logic, limitations in CMOS performance for RF and analog functions means bipolar CMOS (BiCMOSthe integration of bipolar and CMOS on a single chip) remains the most common technology for RF systems.
Comparing options is best done at the system or final product level. BiCMOS combines the advantages of high speed and high driving capability of bipolar devices with the CMOS advantages of high density, low power and low cost. Designers continue to use BiCMOS technologies today because bipolar transistors still outperform CMOS transistors in many RF applications, leading to smaller chip size and better design margins/yield. Design studies often show that "more is less."
For example, using 0.25-micron BiCMOS process technology enables extremely small radio die sizes. At the same time, this design achieves higher levels of integration and performance than CMOS solutions with smaller geometry but larger die size (Figure 3).
Figure 3: Comparison of BiCMOS, CMOS, and SiGe radio designs.
For typical RF silicon designs, total cost is approximately divided into 1/3 die, 1/3 test, 1/3 package. Yield has a huge impact on RF product costs because RF testing is usually done only at the package stage (vs. CMOS digital chips that do extensive wafer testing before packaging). Thus, a bad die does more than lower wafer yields, it also sinks the cost of package and test (2/3 of the value) with it. This implies that even minor yield advantages for BiCMOS/SiGe implementations can lead to significant product cost advantages relative to RF-CMOS implementations.
Some argue CMOS RF functions will be cheaper than BiCMOS/SiGe if die area and yield issues can be solved. The basis for this position is that an RF-CMOS wafer is cheaper.
However, this isn't necessarily true. In general, RF designs benefit little solely from geometry shrinking (in stark contrast with all-digital designs), so competitive RF designs can use technology that is two to three generations behind the leading edge digital CMOS curve and still be extremely cost competitive when analyzed on a "cost per acre" basis. Put another way, the "cost per acre" for leading edge CMOS is often 40 to 100 percent more than BiCMOS technology that is two to three generations more mature.
As an example, a multimode RF device has recently been developed using BiCMOS technology that supports 802.11a/b/g operation. The use of BiCMOS technology enables the dual-band transceiver architecture to integrate more circuitry, including capacitors, resistors, inductors, high performance filters, VCOs, modulators, programmable gain amplifiers and an interface to the baseband processor, all into a single die. Small footprint, high level of integration, and process optimization enable the radio to efficiently perform the frequency translations between RF and baseband with minimal die area. The bottom line result is a smaller die in a technology that costs less per unit area.
Although a monolithic design seems to be the ultimate solution for the design of wireless transceivers, there are many reasons why it may not be desirable to pl ace an entire transceiver on a single die for high-performance applications. For example, RF transceiver front-ends require components that are difficult to efficiently combine into a single monolithic device. As an alternative, some silicon manufacturers are pursuing solutions that utilize multichip module (MCM) technology to integrate the RF, baseband, power amplifier, and several passives into a single package that interfaces via a digital channel with a multimode WLAN media access controller (MAC) [Figure 4].
Figure 4: Block diagram of a multimode WLAN solution.
Indeed it is possible today to combine MAC and baseband (PHY) on the same die, although not all vendors do this. The benefit of a separate MAC is support for other MAC implementations, especially novel proprietary MACs for specific applications such as entertainment or VoIP, and integration of the MAC functionalit y into system level ASICs for embedded applications. RF+baseband packaging (or PHY) advantages include ease of use (no tricky RF design, pre-certified to required standards), a digital channel between the integrated PHY and the MAC, and small size, which can enable new products such as GPRS + WiFi mobile phones and PDAs.
Ultimately, the silicon and system design tradeoffs must lead to products that meet 802.11a/g standards and properly adjust to changing conditions and new users. OEMs and ODMs need to make component selection decisions that are compatible with their requirements for robustness, system support, performance, tight development schedules and costs, while at the same time maintaining compatibility with other Wi-Fi certified products.
About the Authors
Lawrence Rigge is the manager of wireless technology at Agere Systems. He holds a BSEE and MSEE from the University of Michigan and can be reached at firstname.lastname@example.org.
Tony Grewe is the director of client systems at Agere. He has an MBA from Indiana University and a BS from Purdue University. Tony can be reached at email@example.com.